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Merge branch 'CR_9959_dts_6.6_hal.feng' into 'vf2-6.6.y-devel'
CR_9959_dts_6.6_hal.feng See merge request sbc/linux!203
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commit
0135b61d57
5 changed files with 106 additions and 0 deletions
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@ -9,6 +9,7 @@ DTC_FLAGS_jh7110-evb := -@
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dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-beaglev-starlight.dtb
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dtb-$(CONFIG_ARCH_STARFIVE) += jh7100-starfive-visionfive-v1.dtb
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subdir-y += vf2-overlay
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dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.2a.dtb
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dtb-$(CONFIG_ARCH_STARFIVE) += jh7110-starfive-visionfive-2-v1.3b.dtb \
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jh7110-starfive-visionfive-2-ac108.dtb \
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@ -15,7 +15,10 @@
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ethernet0 = &gmac0;
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ethernet1 = &gmac1;
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i2c0 = &i2c0;
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i2c1 = &i2c1;
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i2c2 = &i2c2;
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i2c3 = &i2c3;
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i2c4 = &i2c4;
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i2c5 = &i2c5;
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i2c6 = &i2c6;
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mmc0 = &mmc0;
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@ -23,6 +26,7 @@
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pcie0 = &pcie0;
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pcie1 = &pcie1;
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serial0 = &uart0;
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serial3 = &uart3;
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};
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chosen {
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3
arch/riscv/boot/dts/starfive/vf2-overlay/Makefile
Normal file
3
arch/riscv/boot/dts/starfive/vf2-overlay/Makefile
Normal file
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@ -0,0 +1,3 @@
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# SPDX-License-Identifier: GPL-2.0
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dtb-$(CONFIG_ARCH_STARFIVE) += vf2-overlay-uart3-i2c.dtbo \
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vf2-overlay-can.dtbo
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@ -0,0 +1,23 @@
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/gpio/gpio.h>
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#include "../jh7110-pinfunc.h"
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/ {
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compatible = "starfive,jh7110";
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//can0
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fragment@0 {
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target-path = "/soc/can@130d0000";
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__overlay__ {
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status = "okay";
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};
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};
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//can1
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fragment@1 {
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target-path = "/soc/can@130e0000";
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__overlay__ {
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status = "okay";
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};
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};
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};
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@ -0,0 +1,75 @@
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/gpio/gpio.h>
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#include "../jh7110-pinfunc.h"
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/ {
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compatible = "starfive,jh7110";
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//sysgpio
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fragment@0 {
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target-path = "/soc/pinctrl@13040000";
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__overlay__ {
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dt_uart3_pins: dt-uart3-0 {
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tx-pins {
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pinmux = <GPIOMUX(60, GPOUT_SYS_UART3_TX,
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GPOEN_ENABLE,
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GPI_NONE)>;
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bias-disable;
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drive-strength = <12>;
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input-disable;
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input-schmitt-disable;
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slew-rate = <0>;
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};
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rx-pins {
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pinmux = <GPIOMUX(63, GPOUT_LOW,
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GPOEN_DISABLE,
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GPI_SYS_UART3_RX)>;
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bias-pull-up;
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drive-strength = <2>;
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input-enable;
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input-schmitt-enable;
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slew-rate = <0>;
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};
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};
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dt_i2c1_pins: dt-i2c1-0 {
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i2c-pins {
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pinmux = <GPIOMUX(42, GPOUT_LOW,
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GPOEN_SYS_I2C1_CLK,
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GPI_SYS_I2C1_CLK)>,
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<GPIOMUX(43, GPOUT_LOW,
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GPOEN_SYS_I2C1_DATA,
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GPI_SYS_I2C1_DATA)>;
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bias-pull-up;
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input-enable;
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input-schmitt-enable;
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};
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};
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};
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};
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//uart3
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fragment@1 {
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target-path = "/soc/serial@12000000";
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__overlay__ {
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pinctrl-names = "default";
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pinctrl-0 = <&dt_uart3_pins>;
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status = "okay";
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};
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};
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//i2c1
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fragment@2 {
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target-path = "/soc/i2c@10040000";
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__overlay__ {
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clock-frequency = <100000>;
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i2c-sda-hold-time-ns = <300>;
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i2c-sda-falling-time-ns = <510>;
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i2c-scl-falling-time-ns = <510>;
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pinctrl-names = "default";
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pinctrl-0 = <&dt_i2c1_pins>;
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status = "okay";
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};
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};
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};
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