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Clock framework and driver fixes, all of which fix user-visible

Browse source 
regressions. As usual most fixes are for platform-specific clock
 drivers, but there are also two fixes to the clk core after recent
 changes to the way that clock unregistration is handled.
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Merge tag 'clk-fixes-for-linus' of git://git.linaro.org/people/mike.turquette/linux

Pull clock framework fixes from Mike Turquette:
 "Clock framework and driver fixes, all of which fix user-visible
  regressions.

  As usual most fixes are for platform-specific clock drivers, but there
  are also two fixes to the clk core after recent changes to the way
  that clock unregistration is handled"

* tag 'clk-fixes-for-linus' of git://git.linaro.org/people/mike.turquette/linux:
  clk: tegra: Fix wrong value written to PLLE_AUX
  clk: shmobile: clk-mstp: change to using clock-indices
  clk: Fix slab corruption in clk_unregister()
  clk: Fix double free due to devm_clk_register()
  clk: socfpga: fix clock driver for 3.15
  clk: divider: Fix best div calculation for power-of-two and table dividers
  clk: bcm281xx: don't use unnamed structs or unions
This commit is contained in:
Linus Torvalds 2014-05-21 18:55:17 +09:00
commit 026d68be45
10 changed files with 151 additions and 128 deletions
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2
Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
View file

@ -43,7 +43,7 @@ Example
clock-output-names =
"tpu0", "mmcif1", "sdhi3", "sdhi2",
"sdhi1", "sdhi0", "mmcif0";
renesas,clock-indices = <
clock-indices = <
R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3
R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0
R8A7790_CLK_MMCIF0