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Merge branch 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm: ARM: drop experimental status for ARM_PATCH_PHYS_VIRT ARM: 7008/1: alignment: Make SIGBUS sent to userspace POSIXly correct ARM: 7007/1: alignment: Prevent ignoring of faults with ARMv6 unaligned access model ARM: 7010/1: mm: fix invalid loop for poison_init_mem ARM: 7005/1: freshen up mm/proc-arm946.S dmaengine: PL08x: Fix trivial build error ARM: Fix build error for SMP=n builds
This commit is contained in:
commit
068ef73912
6 changed files with 50 additions and 19 deletions
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@ -195,8 +195,7 @@ config VECTORS_BASE
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The base address of exception vectors.
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The base address of exception vectors.
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config ARM_PATCH_PHYS_VIRT
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config ARM_PATCH_PHYS_VIRT
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bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)"
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bool "Patch physical to virtual translations at runtime"
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depends on EXPERIMENTAL
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depends on !XIP_KERNEL && MMU
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depends on !XIP_KERNEL && MMU
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depends on !ARCH_REALVIEW || !SPARSEMEM
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depends on !ARCH_REALVIEW || !SPARSEMEM
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help
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help
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@ -323,7 +323,11 @@ int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs,
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#endif
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#endif
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s = find_mod_section(hdr, sechdrs, ".alt.smp.init");
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s = find_mod_section(hdr, sechdrs, ".alt.smp.init");
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if (s && !is_smp())
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if (s && !is_smp())
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#ifdef CONFIG_SMP_ON_UP
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fixup_smp((void *)s->sh_addr, s->sh_size);
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fixup_smp((void *)s->sh_addr, s->sh_size);
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#else
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return -EINVAL;
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#endif
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return 0;
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return 0;
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}
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}
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@ -22,6 +22,7 @@
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#include <linux/sched.h>
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#include <linux/sched.h>
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#include <linux/uaccess.h>
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#include <linux/uaccess.h>
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#include <asm/system.h>
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#include <asm/unaligned.h>
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#include <asm/unaligned.h>
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#include "fault.h"
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#include "fault.h"
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@ -95,6 +96,33 @@ static const char *usermode_action[] = {
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"signal+warn"
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"signal+warn"
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};
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};
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/* Return true if and only if the ARMv6 unaligned access model is in use. */
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static bool cpu_is_v6_unaligned(void)
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{
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return cpu_architecture() >= CPU_ARCH_ARMv6 && (cr_alignment & CR_U);
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}
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static int safe_usermode(int new_usermode, bool warn)
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{
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/*
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* ARMv6 and later CPUs can perform unaligned accesses for
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* most single load and store instructions up to word size.
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* LDM, STM, LDRD and STRD still need to be handled.
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*
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* Ignoring the alignment fault is not an option on these
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* CPUs since we spin re-faulting the instruction without
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* making any progress.
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*/
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if (cpu_is_v6_unaligned() && !(new_usermode & (UM_FIXUP | UM_SIGNAL))) {
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new_usermode |= UM_FIXUP;
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if (warn)
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printk(KERN_WARNING "alignment: ignoring faults is unsafe on this CPU. Defaulting to fixup mode.\n");
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}
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return new_usermode;
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}
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static int alignment_proc_show(struct seq_file *m, void *v)
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static int alignment_proc_show(struct seq_file *m, void *v)
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{
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{
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seq_printf(m, "User:\t\t%lu\n", ai_user);
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seq_printf(m, "User:\t\t%lu\n", ai_user);
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@ -125,7 +153,7 @@ static ssize_t alignment_proc_write(struct file *file, const char __user *buffer
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if (get_user(mode, buffer))
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if (get_user(mode, buffer))
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return -EFAULT;
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return -EFAULT;
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if (mode >= '0' && mode <= '5')
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if (mode >= '0' && mode <= '5')
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ai_usermode = mode - '0';
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ai_usermode = safe_usermode(mode - '0', true);
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}
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}
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return count;
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return count;
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}
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}
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@ -886,9 +914,16 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
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if (ai_usermode & UM_FIXUP)
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if (ai_usermode & UM_FIXUP)
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goto fixup;
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goto fixup;
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if (ai_usermode & UM_SIGNAL)
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if (ai_usermode & UM_SIGNAL) {
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force_sig(SIGBUS, current);
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siginfo_t si;
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else {
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si.si_signo = SIGBUS;
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si.si_errno = 0;
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si.si_code = BUS_ADRALN;
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si.si_addr = (void __user *)addr;
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force_sig_info(si.si_signo, &si, current);
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} else {
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/*
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/*
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* We're about to disable the alignment trap and return to
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* We're about to disable the alignment trap and return to
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* user space. But if an interrupt occurs before actually
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* user space. But if an interrupt occurs before actually
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@ -926,20 +961,11 @@ static int __init alignment_init(void)
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return -ENOMEM;
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return -ENOMEM;
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#endif
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#endif
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/*
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if (cpu_is_v6_unaligned()) {
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* ARMv6 and later CPUs can perform unaligned accesses for
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* most single load and store instructions up to word size.
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* LDM, STM, LDRD and STRD still need to be handled.
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*
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* Ignoring the alignment fault is not an option on these
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* CPUs since we spin re-faulting the instruction without
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* making any progress.
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*/
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if (cpu_architecture() >= CPU_ARCH_ARMv6 && (cr_alignment & CR_U)) {
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cr_alignment &= ~CR_A;
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cr_alignment &= ~CR_A;
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cr_no_alignment &= ~CR_A;
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cr_no_alignment &= ~CR_A;
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set_cr(cr_alignment);
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set_cr(cr_alignment);
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ai_usermode = UM_FIXUP;
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ai_usermode = safe_usermode(ai_usermode, false);
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}
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}
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hook_fault_code(1, do_alignment, SIGBUS, BUS_ADRALN,
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hook_fault_code(1, do_alignment, SIGBUS, BUS_ADRALN,
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@ -441,7 +441,7 @@ static inline int free_area(unsigned long pfn, unsigned long end, char *s)
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static inline void poison_init_mem(void *s, size_t count)
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static inline void poison_init_mem(void *s, size_t count)
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{
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{
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u32 *p = (u32 *)s;
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u32 *p = (u32 *)s;
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while ((count = count - 4))
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for (; count != 0; count -= 4)
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*p++ = 0xe7fddef0;
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*p++ = 0xe7fddef0;
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}
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}
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@ -410,6 +410,7 @@ __arm946_proc_info:
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.long 0x41009460
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.long 0x41009460
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.long 0xff00fff0
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.long 0xff00fff0
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.long 0
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.long 0
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.long 0
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b __arm946_setup
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b __arm946_setup
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.long cpu_arch_name
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.long cpu_arch_name
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.long cpu_elf_name
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.long cpu_elf_name
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@ -418,6 +419,6 @@ __arm946_proc_info:
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.long arm946_processor_functions
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.long arm946_processor_functions
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.long 0
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.long 0
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.long 0
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.long 0
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.long arm940_cache_fns
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.long arm946_cache_fns
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.size __arm946_proc_info, . - __arm946_proc_info
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.size __arm946_proc_info, . - __arm946_proc_info
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@ -80,6 +80,7 @@
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#include <linux/interrupt.h>
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#include <linux/interrupt.h>
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#include <linux/slab.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/dmapool.h>
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#include <linux/dmapool.h>
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#include <linux/dmaengine.h>
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#include <linux/dmaengine.h>
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#include <linux/amba/bus.h>
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#include <linux/amba/bus.h>
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