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drm/i915: Reorder i915_add_request to separate the phases better

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Let's avoid mixing sealing the hardware commands for the request and
adding the request to the software tracking.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20160909131201.16673-15-chris@chris-wilson.co.uk
This commit is contained in:
Chris Wilson 2016-09-09 14:11:55 +01:00
parent 5590af3e11
commit 0f25dff6e9
1 changed files with 14 additions and 14 deletions
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28
drivers/gpu/drm/i915/i915_gem_request.c
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@ -494,6 +494,8 @@ void __i915_add_request(struct drm_i915_gem_request *request, bool flush_caches)
u32 reserved_tail; u32 reserved_tail;
int ret; int ret;
trace_i915_gem_request_add(request);
/* /*
* To ensure that this call will not fail, space for its emissions * To ensure that this call will not fail, space for its emissions
* should already have been reserved in the ring buffer. Let the ring * should already have been reserved in the ring buffer. Let the ring
@ -517,20 +519,6 @@ void __i915_add_request(struct drm_i915_gem_request *request, bool flush_caches)
WARN(ret, "engine->emit_flush() failed: %d!\n", ret); WARN(ret, "engine->emit_flush() failed: %d!\n", ret);
} }
trace_i915_gem_request_add(request);
/* Seal the request and mark it as pending execution. Note that
* we may inspect this state, without holding any locks, during
* hangcheck. Hence we apply the barrier to ensure that we do not
* see a more recent value in the hws than we are tracking.
*/
request->emitted_jiffies = jiffies;
request->previous_seqno = engine->last_submitted_seqno;
engine->last_submitted_seqno = request->fence.seqno;
i915_gem_active_set(&engine->last_request, request);
list_add_tail(&request->link, &engine->request_list);
list_add_tail(&request->ring_link, &ring->request_list);
/* Record the position of the start of the breadcrumb so that /* Record the position of the start of the breadcrumb so that
* should we detect the updated seqno part-way through the * should we detect the updated seqno part-way through the
* GPU processing the request, we never over-estimate the * GPU processing the request, we never over-estimate the
@ -551,6 +539,18 @@ void __i915_add_request(struct drm_i915_gem_request *request, bool flush_caches)
"for adding the request (%d bytes)\n", "for adding the request (%d bytes)\n",
reserved_tail, ret); reserved_tail, ret);
/* Seal the request and mark it as pending execution. Note that
* we may inspect this state, without holding any locks, during
* hangcheck. Hence we apply the barrier to ensure that we do not
* see a more recent value in the hws than we are tracking.
*/
request->emitted_jiffies = jiffies;
request->previous_seqno = engine->last_submitted_seqno;
engine->last_submitted_seqno = request->fence.seqno;
i915_gem_active_set(&engine->last_request, request);
list_add_tail(&request->link, &engine->request_list);
list_add_tail(&request->ring_link, &ring->request_list);
i915_gem_mark_busy(engine); i915_gem_mark_busy(engine);
local_bh_disable(); local_bh_disable();