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gpio: generic: factor into gpio_chip struct
The separate struct bgpio_chip has been a pain to handle, both by being confusingly similar in name to struct gpio_chip and for being contained inside a struct so that struct gpio_chip is contained in a struct contained in a struct, making several steps of dereferencing necessary. Make things simpler: include the fields directly into <linux/gpio/driver.h>, #ifdef:ed for CONFIG_GENERIC_GPIO, and get rid of the <linux/basic_mmio_gpio.h> altogether. Prefix some of the member variables with bgpio_* and add proper kerneldoc while we're at it. Modify all users to handle the change and use a struct gpio_chip directly. And while we're at it: replace all container_of() dereferencing by gpiochip_get_data() and registering the gpio_chip with gpiochip_add_data(). Cc: arm@kernel.org Cc: Alexander Shiyan <shc_work@mail.ru> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Kukjin Kim <kgene@kernel.org> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Nicolas Pitre <nicolas.pitre@linaro.org> Cc: Olof Johansson <olof@lixom.net> Cc: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Cc: Rabin Vincent <rabin@rab.in> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-omap@vger.kernel.org Cc: linux-samsung-soc@vger.kernel.org Cc: bcm-kernel-feedback-list@broadcom.com Acked-by: Gregory Fong <gregory.0xf0@gmail.com> Acked-by: Liviu Dudau <Liviu.Dudau@arm.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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22 changed files with 442 additions and 552 deletions
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@ -8,6 +8,7 @@
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#include <linux/irqdomain.h>
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#include <linux/lockdep.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/kconfig.h>
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struct device;
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struct gpio_desc;
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@ -65,6 +66,23 @@ struct seq_file;
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* registers.
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* @irq_not_threaded: flag must be set if @can_sleep is set but the
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* IRQs don't need to be threaded
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* @read_reg: reader function for generic GPIO
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* @write_reg: writer function for generic GPIO
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* @pin2mask: some generic GPIO controllers work with the big-endian bits
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* notation, e.g. in a 8-bits register, GPIO7 is the least significant
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* bit. This callback assigns the right bit mask.
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* @reg_dat: data (in) register for generic GPIO
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* @reg_set: output set register (out=high) for generic GPIO
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* @reg_clk: output clear register (out=low) for generic GPIO
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* @reg_dir: direction setting register for generic GPIO
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* @bgpio_bits: number of register bits used for a generic GPIO i.e.
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* <register width> * 8
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* @bgpio_lock: used to lock chip->bgpio_data. Also, this is needed to keep
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* shadowed and real data registers writes together.
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* @bgpio_data: shadowed data register for generic GPIO to clear/set bits
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* safely.
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* @bgpio_dir: shadowed direction register for generic GPIO to clear/set
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* direction safely.
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* @irqchip: GPIO IRQ chip impl, provided by GPIO driver
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* @irqdomain: Interrupt translation domain; responsible for mapping
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* between GPIO hwirq number and linux irq number
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@ -128,6 +146,20 @@ struct gpio_chip {
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bool can_sleep;
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bool irq_not_threaded;
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#if IS_ENABLED(CONFIG_GPIO_GENERIC)
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unsigned long (*read_reg)(void __iomem *reg);
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void (*write_reg)(void __iomem *reg, unsigned long data);
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unsigned long (*pin2mask)(struct gpio_chip *gc, unsigned int pin);
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void __iomem *reg_dat;
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void __iomem *reg_set;
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void __iomem *reg_clr;
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void __iomem *reg_dir;
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int bgpio_bits;
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spinlock_t bgpio_lock;
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unsigned long bgpio_data;
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unsigned long bgpio_dir;
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#endif
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#ifdef CONFIG_GPIOLIB_IRQCHIP
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/*
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* With CONFIG_GPIOLIB_IRQCHIP we get an irqchip inside the gpiolib
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@ -188,6 +220,28 @@ static inline void *gpiochip_get_data(struct gpio_chip *chip)
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struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc);
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#if IS_ENABLED(CONFIG_GPIO_GENERIC)
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struct bgpio_pdata {
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const char *label;
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int base;
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int ngpio;
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};
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int bgpio_init(struct gpio_chip *gc, struct device *dev,
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unsigned long sz, void __iomem *dat, void __iomem *set,
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void __iomem *clr, void __iomem *dirout, void __iomem *dirin,
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unsigned long flags);
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#define BGPIOF_BIG_ENDIAN BIT(0)
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#define BGPIOF_UNREADABLE_REG_SET BIT(1) /* reg_set is unreadable */
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#define BGPIOF_UNREADABLE_REG_DIR BIT(2) /* reg_dir is unreadable */
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#define BGPIOF_BIG_ENDIAN_BYTE_ORDER BIT(3)
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#define BGPIOF_READ_OUTPUT_REG_SET BIT(4) /* reg_set stores output value */
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#define BGPIOF_NO_OUTPUT BIT(5) /* only input */
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#endif
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#ifdef CONFIG_GPIOLIB_IRQCHIP
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void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip,
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