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Merge branches 'pci/aspm', 'pci/enumeration', 'pci/hotplug', 'pci/misc', 'pci/msi', 'pci/resource' and 'pci/virtualization' into next
* pci/aspm: PCI/ASPM: Simplify Clock Power Management setting PCI: Use dev->has_secondary_link to find downstream PCIe links PCI/ASPM: Use dev->has_secondary_link to find downstream links PCI: Add dev->has_secondary_link to track downstream PCIe links PCI/ASPM: Remove redundant PCIe port type checking PCI/ASPM: Drop __pci_disable_link_state() useless "force" parameter * pci/enumeration: PCI: Remove unused pci_scan_bus_parented() xen/pcifront: Don't use deprecated function pci_scan_bus_parented() PCI: designware: Use pci_scan_root_bus() for simplicity PCI: tegra: Remove tegra_pcie_scan_bus() PCI: mvebu: Remove mvebu_pcie_scan_bus() * pci/hotplug: PCI: pciehp: Wait for hotplug command completion where necessary PCI: Propagate the "ignore hotplug" setting to parent ACPI / hotplug / PCI: Check ignore_hotplug for all downstream devices PCI: pciehp: Drop pointless label from pciehp_probe() PCI: pciehp: Drop pointless ACPI-based "slot detection" check * pci/misc: PCI: Remove unused pci_dma_burst_advice() PCI: Remove unused pcibios_select_root() (again) PCI: Remove unnecessary #includes of <asm/pci.h> PCI: Include <linux/pci.h>, not <asm/pci.h> * pci/msi: PCI/MSI: Remove unused pci_msi_off() PCI/MSI: Drop pci_msi_off() calls from quirks ntb: Drop pci_msi_off() call during probe virtio_pci: drop pci_msi_off() call during probe PCI/MSI: Disable MSI at enumeration even if kernel doesn't support MSI PCI/MSI: Export pci_msi_set_enable(), pci_msix_clear_and_set_ctrl() PCI/MSI: Rename msi_set_enable(), msix_clear_and_set_ctrl() * pci/resource: PCI: Add pci_bus_addr_t * pci/virtualization: ACPI / PCI: Account for ARI in _PRT lookups PCI: Move pci_ari_enabled() to global header PCI: Add function 1 DMA alias quirk for Marvell 9120 PCI: Add ACS quirks for Intel 9-series PCH root ports
This commit is contained in:
commit
0ff9b9bad6
56 changed files with 250 additions and 692 deletions
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@ -254,8 +254,8 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
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}
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if (res->flags & IORESOURCE_MEM_64) {
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if ((sizeof(dma_addr_t) < 8 || sizeof(resource_size_t) < 8) &&
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sz64 > 0x100000000ULL) {
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if ((sizeof(pci_bus_addr_t) < 8 || sizeof(resource_size_t) < 8)
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&& sz64 > 0x100000000ULL) {
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res->flags |= IORESOURCE_UNSET | IORESOURCE_DISABLED;
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res->start = 0;
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res->end = 0;
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@ -264,7 +264,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
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goto out;
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}
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if ((sizeof(dma_addr_t) < 8) && l) {
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if ((sizeof(pci_bus_addr_t) < 8) && l) {
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/* Above 32-bit boundary; try to reallocate */
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res->flags |= IORESOURCE_UNSET;
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res->start = 0;
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@ -399,7 +399,7 @@ static void pci_read_bridge_mmio_pref(struct pci_bus *child)
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struct pci_dev *dev = child->self;
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u16 mem_base_lo, mem_limit_lo;
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u64 base64, limit64;
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dma_addr_t base, limit;
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pci_bus_addr_t base, limit;
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struct pci_bus_region region;
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struct resource *res;
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@ -426,8 +426,8 @@ static void pci_read_bridge_mmio_pref(struct pci_bus *child)
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}
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}
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base = (dma_addr_t) base64;
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limit = (dma_addr_t) limit64;
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base = (pci_bus_addr_t) base64;
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limit = (pci_bus_addr_t) limit64;
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if (base != base64) {
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dev_err(&dev->dev, "can't handle bridge window above 4GB (bus address %#010llx)\n",
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@ -973,6 +973,8 @@ void set_pcie_port_type(struct pci_dev *pdev)
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{
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int pos;
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u16 reg16;
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int type;
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struct pci_dev *parent;
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pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
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if (!pos)
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@ -982,6 +984,22 @@ void set_pcie_port_type(struct pci_dev *pdev)
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pdev->pcie_flags_reg = reg16;
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pci_read_config_word(pdev, pos + PCI_EXP_DEVCAP, ®16);
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pdev->pcie_mpss = reg16 & PCI_EXP_DEVCAP_PAYLOAD;
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/*
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* A Root Port is always the upstream end of a Link. No PCIe
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* component has two Links. Two Links are connected by a Switch
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* that has a Port on each Link and internal logic to connect the
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* two Ports.
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*/
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type = pci_pcie_type(pdev);
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if (type == PCI_EXP_TYPE_ROOT_PORT)
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pdev->has_secondary_link = 1;
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else if (type == PCI_EXP_TYPE_UPSTREAM ||
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type == PCI_EXP_TYPE_DOWNSTREAM) {
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parent = pci_upstream_bridge(pdev);
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if (!parent->has_secondary_link)
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pdev->has_secondary_link = 1;
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}
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}
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void set_pcie_hotplug_bridge(struct pci_dev *pdev)
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@ -1085,6 +1103,22 @@ int pci_cfg_space_size(struct pci_dev *dev)
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#define LEGACY_IO_RESOURCE (IORESOURCE_IO | IORESOURCE_PCI_FIXED)
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static void pci_msi_setup_pci_dev(struct pci_dev *dev)
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{
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/*
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* Disable the MSI hardware to avoid screaming interrupts
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* during boot. This is the power on reset default so
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* usually this should be a noop.
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*/
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dev->msi_cap = pci_find_capability(dev, PCI_CAP_ID_MSI);
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if (dev->msi_cap)
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pci_msi_set_enable(dev, 0);
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dev->msix_cap = pci_find_capability(dev, PCI_CAP_ID_MSIX);
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if (dev->msix_cap)
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pci_msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0);
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}
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/**
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* pci_setup_device - fill in class and map information of a device
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* @dev: the device structure to fill
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@ -1140,6 +1174,8 @@ int pci_setup_device(struct pci_dev *dev)
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/* "Unknown power state" */
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dev->current_state = PCI_UNKNOWN;
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pci_msi_setup_pci_dev(dev);
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/* Early fixups, before probing the BARs */
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pci_fixup_device(pci_fixup_early, dev);
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/* device class may be changed after fixup */
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@ -1611,7 +1647,7 @@ static int only_one_child(struct pci_bus *bus)
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return 0;
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if (pci_pcie_type(parent) == PCI_EXP_TYPE_ROOT_PORT)
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return 1;
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if (pci_pcie_type(parent) == PCI_EXP_TYPE_DOWNSTREAM &&
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if (parent->has_secondary_link &&
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!pci_has_flag(PCI_SCAN_ALL_PCIE_DEVS))
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return 1;
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return 0;
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@ -2094,25 +2130,6 @@ struct pci_bus *pci_scan_root_bus(struct device *parent, int bus,
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}
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EXPORT_SYMBOL(pci_scan_root_bus);
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/* Deprecated; use pci_scan_root_bus() instead */
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struct pci_bus *pci_scan_bus_parented(struct device *parent,
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int bus, struct pci_ops *ops, void *sysdata)
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{
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LIST_HEAD(resources);
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struct pci_bus *b;
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pci_add_resource(&resources, &ioport_resource);
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pci_add_resource(&resources, &iomem_resource);
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pci_add_resource(&resources, &busn_resource);
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b = pci_create_root_bus(parent, bus, ops, sysdata, &resources);
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if (b)
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pci_scan_child_bus(b);
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else
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pci_free_resource_list(&resources);
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return b;
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}
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EXPORT_SYMBOL(pci_scan_bus_parented);
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struct pci_bus *pci_scan_bus(int bus, struct pci_ops *ops,
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void *sysdata)
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{
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