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iio: temp: maxim_thermocouple: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition
Fixes: 1f25ca11d8
("iio: temperature: add support for Maxim thermocouple chips")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Matt Ranostay <mranostay@gmail.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-93-jic23@kernel.org
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@ -122,7 +122,7 @@ struct maxim_thermocouple_data {
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struct spi_device *spi;
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const struct maxim_thermocouple_chip *chip;
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u8 buffer[16] ____cacheline_aligned;
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u8 buffer[16] __aligned(IIO_DMA_MINALIGN);
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char tc_type;
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};
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