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Merge branch 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

Browse source 
Pull i2c fixes from Wolfram Sang:
 "A mixture of driver and documentation bugfixes for I2C"

* 'i2c/for-current' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
  i2c: imx: mention Oleksij as maintainer of the binding docs
  i2c: exynos5: correct top kerneldoc
  i2c: designware: Adjust bus_freq_hz when refuse high speed mode set
  i2c: hix5hd2: use the correct HiSilicon copyright
  i2c: gpio: update email address in binding docs
  i2c: imx: drop me as maintainer of binding docs
  i2c: stm32f4: Mundane typo fix
  I2C: JZ4780: Fix bug for Ingenic X1000.
  i2c: turn recovery error on init to debug
This commit is contained in:
Linus Torvalds 2021-04-10 09:10:55 -07:00
commit 12a0cf7241
8 changed files with 12 additions and 10 deletions
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2
Documentation/devicetree/bindings/i2c/i2c-gpio.yaml
View file

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Bindings for GPIO bitbanged I2C title: Bindings for GPIO bitbanged I2C
maintainers: maintainers:
- Wolfram Sang <wolfram@the-dreams.de> - Wolfram Sang <wsa@kernel.org>
allOf: allOf:
- $ref: /schemas/i2c/i2c-controller.yaml# - $ref: /schemas/i2c/i2c-controller.yaml#

2
Documentation/devicetree/bindings/i2c/i2c-imx.yaml
View file

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX title: Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
maintainers: maintainers:
- Wolfram Sang <wolfram@the-dreams.de> - Oleksij Rempel <o.rempel@pengutronix.de>
allOf: allOf:
- $ref: /schemas/i2c/i2c-controller.yaml# - $ref: /schemas/i2c/i2c-controller.yaml#

1
drivers/i2c/busses/i2c-designware-master.c
View file

@ -129,6 +129,7 @@ static int i2c_dw_set_timings_master(struct dw_i2c_dev *dev)
if ((comp_param1 & DW_IC_COMP_PARAM_1_SPEED_MODE_MASK) if ((comp_param1 & DW_IC_COMP_PARAM_1_SPEED_MODE_MASK)
!= DW_IC_COMP_PARAM_1_SPEED_MODE_HIGH) { != DW_IC_COMP_PARAM_1_SPEED_MODE_HIGH) {
dev_err(dev->dev, "High Speed not supported!\n"); dev_err(dev->dev, "High Speed not supported!\n");
t->bus_freq_hz = I2C_MAX_FAST_MODE_FREQ;
dev->master_cfg &= ~DW_IC_CON_SPEED_MASK; dev->master_cfg &= ~DW_IC_CON_SPEED_MASK;
dev->master_cfg |= DW_IC_CON_SPEED_FAST; dev->master_cfg |= DW_IC_CON_SPEED_FAST;
dev->hs_hcnt = 0; dev->hs_hcnt = 0;

2
drivers/i2c/busses/i2c-exynos5.c
View file

@ -1,5 +1,5 @@
// SPDX-License-Identifier: GPL-2.0-only // SPDX-License-Identifier: GPL-2.0-only
/** /*
* i2c-exynos5.c - Samsung Exynos5 I2C Controller Driver * i2c-exynos5.c - Samsung Exynos5 I2C Controller Driver
* *
* Copyright (C) 2013 Samsung Electronics Co., Ltd. * Copyright (C) 2013 Samsung Electronics Co., Ltd.

2
drivers/i2c/busses/i2c-hix5hd2.c
View file

@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-or-later // SPDX-License-Identifier: GPL-2.0-or-later
/* /*
* Copyright (c) 2014 Linaro Ltd. * Copyright (c) 2014 Linaro Ltd.
* Copyright (c) 2014 Hisilicon Limited. * Copyright (c) 2014 HiSilicon Limited.
* *
* Now only support 7 bit address. * Now only support 7 bit address.
*/ */

4
drivers/i2c/busses/i2c-jz4780.c
View file

@ -525,8 +525,8 @@ static irqreturn_t jz4780_i2c_irq(int irqno, void *dev_id)
i2c_sta = jz4780_i2c_readw(i2c, JZ4780_I2C_STA); i2c_sta = jz4780_i2c_readw(i2c, JZ4780_I2C_STA);
data = *i2c->wbuf; data = *i2c->wbuf;
data &= ~JZ4780_I2C_DC_READ; data &= ~JZ4780_I2C_DC_READ;
if ((!i2c->stop_hold) && (i2c->cdata->version >= if ((i2c->wt_len == 1) && (!i2c->stop_hold) &&
ID_X1000)) (i2c->cdata->version >= ID_X1000))
data |= X1000_I2C_DC_STOP; data |= X1000_I2C_DC_STOP;
jz4780_i2c_writew(i2c, JZ4780_I2C_DC, data); jz4780_i2c_writew(i2c, JZ4780_I2C_DC, data);
i2c->wbuf++; i2c->wbuf++;

2
drivers/i2c/busses/i2c-stm32f4.c
View file

@ -534,7 +534,7 @@ static void stm32f4_i2c_handle_rx_addr(struct stm32f4_i2c_dev *i2c_dev)
default: default:
/* /*
* N-byte reception: * N-byte reception:
* Enable ACK, reset POS (ACK postion) and clear ADDR flag. * Enable ACK, reset POS (ACK position) and clear ADDR flag.
* In that way, ACK will be sent as soon as the current byte * In that way, ACK will be sent as soon as the current byte
* will be received in the shift register * will be received in the shift register
*/ */

7
drivers/i2c/i2c-core-base.c
View file

@ -378,7 +378,7 @@ static int i2c_gpio_init_recovery(struct i2c_adapter *adap)
static int i2c_init_recovery(struct i2c_adapter *adap) static int i2c_init_recovery(struct i2c_adapter *adap)
{ {
struct i2c_bus_recovery_info *bri = adap->bus_recovery_info; struct i2c_bus_recovery_info *bri = adap->bus_recovery_info;
char *err_str; char *err_str, *err_level = KERN_ERR;
if (!bri) if (!bri)
return 0; return 0;
@ -387,7 +387,8 @@ static int i2c_init_recovery(struct i2c_adapter *adap)
return -EPROBE_DEFER; return -EPROBE_DEFER;
if (!bri->recover_bus) { if (!bri->recover_bus) {
err_str = "no recover_bus() found"; err_str = "no suitable method provided";
err_level = KERN_DEBUG;
goto err; goto err;
} }
@ -414,7 +415,7 @@ static int i2c_init_recovery(struct i2c_adapter *adap)
return 0; return 0;
err: err:
dev_err(&adap->dev, "Not using recovery: %s\n", err_str); dev_printk(err_level, &adap->dev, "Not using recovery: %s\n", err_str);
adap->bus_recovery_info = NULL; adap->bus_recovery_info = NULL;
return -EINVAL; return -EINVAL;