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percpu: align percpu readmostly subsection to cacheline

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Currently percpu readmostly subsection may share cachelines with other
percpu subsections which may result in unnecessary cacheline bounce
and performance degradation.

This patch adds @cacheline parameter to PERCPU() and PERCPU_VADDR()
linker macros, makes each arch linker scripts specify its cacheline
size and use it to align percpu subsections.

This is based on Shaohua's x86 only patch.

Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: Shaohua Li <shaohua.li@intel.com>
This commit is contained in:
Tejun Heo 2011-01-25 14:26:50 +01:00
parent c723fdab8a
commit 19df0c2fef
19 changed files with 41 additions and 32 deletions
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4
arch/x86/kernel/vmlinux.lds.S
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@ -230,7 +230,7 @@ SECTIONS
* output PHDR, so the next output section - .init.text - should
* start another segment - init.
*/
PERCPU_VADDR(0, :percpu)
PERCPU_VADDR(INTERNODE_CACHE_BYTES, 0, :percpu)
#endif
INIT_TEXT_SECTION(PAGE_SIZE)
@ -305,7 +305,7 @@ SECTIONS
}
#if !defined(CONFIG_X86_64) || !defined(CONFIG_SMP)
PERCPU(THREAD_SIZE)
PERCPU(INTERNODE_CACHE_BYTES, THREAD_SIZE)
#endif
. = ALIGN(PAGE_SIZE);