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drm/amd/display: do not wait for mpc idle if tg is disabled
[Why] When booting, the driver waits for the MPC idle bit to be set as part of pipe initialization. However, on some systems this occurs before OTG is enabled, and since the MPC idle bit won't be set until the vupdate signal occurs (which requires OTG to be enabled), this never happens and the wait times out. This can add hundreds of milliseconds to the boot time. [How] Do not wait for mpc idle if tg is disabled Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com> Signed-off-by: Josip Pavic <Josip.Pavic@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1 changed files with 2 additions and 1 deletions
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@ -3189,7 +3189,8 @@ void dcn10_wait_for_mpcc_disconnect(
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if (pipe_ctx->stream_res.opp->mpcc_disconnect_pending[mpcc_inst]) {
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struct hubp *hubp = get_hubp_by_inst(res_pool, mpcc_inst);
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res_pool->mpc->funcs->wait_for_idle(res_pool->mpc, mpcc_inst);
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if (pipe_ctx->stream_res.tg->funcs->is_tg_enabled(pipe_ctx->stream_res.tg))
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res_pool->mpc->funcs->wait_for_idle(res_pool->mpc, mpcc_inst);
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pipe_ctx->stream_res.opp->mpcc_disconnect_pending[mpcc_inst] = false;
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hubp->funcs->set_blank(hubp, true);
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}
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