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Merge branches 'arm/exynos', 'arm/omap', 'arm/rockchip', 'arm/mediatek', 'arm/smmu', 'arm/core', 'x86/vt-d', 'x86/amd' and 'core' into next
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1088 changed files with 14838 additions and 7824 deletions
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@ -19,12 +19,12 @@
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#ifndef __LINUX_IOMMU_H
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#define __LINUX_IOMMU_H
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#include <linux/scatterlist.h>
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#include <linux/device.h>
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#include <linux/types.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/of.h>
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#include <linux/types.h>
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#include <linux/scatterlist.h>
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#include <trace/events/iommu.h>
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#define IOMMU_READ (1 << 0)
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#define IOMMU_WRITE (1 << 1)
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@ -32,10 +32,13 @@
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#define IOMMU_NOEXEC (1 << 3)
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#define IOMMU_MMIO (1 << 4) /* e.g. things like MSI doorbells */
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/*
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* This is to make the IOMMU API setup privileged
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* mapppings accessible by the master only at higher
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* privileged execution level and inaccessible at
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* less privileged levels.
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* Where the bus hardware includes a privilege level as part of its access type
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* markings, and certain devices are capable of issuing transactions marked as
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* either 'supervisor' or 'user', the IOMMU_PRIV flag requests that the other
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* given permission flags only apply to accesses at the higher privilege level,
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* and that unprivileged transactions should have as little access as possible.
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* This would usually imply the same permissions as kernel mappings on the CPU,
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* if the IOMMU page table format is equivalent.
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*/
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#define IOMMU_PRIV (1 << 5)
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@ -125,9 +128,16 @@ enum iommu_attr {
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};
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/* These are the possible reserved region types */
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#define IOMMU_RESV_DIRECT (1 << 0)
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#define IOMMU_RESV_RESERVED (1 << 1)
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#define IOMMU_RESV_MSI (1 << 2)
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enum iommu_resv_type {
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/* Memory regions which must be mapped 1:1 at all times */
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IOMMU_RESV_DIRECT,
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/* Arbitrary "never map this or give it to a device" address ranges */
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IOMMU_RESV_RESERVED,
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/* Hardware MSI region (untranslated) */
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IOMMU_RESV_MSI,
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/* Software-managed MSI translation window */
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IOMMU_RESV_SW_MSI,
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};
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/**
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* struct iommu_resv_region - descriptor for a reserved memory region
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@ -142,7 +152,7 @@ struct iommu_resv_region {
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phys_addr_t start;
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size_t length;
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int prot;
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int type;
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enum iommu_resv_type type;
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};
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#ifdef CONFIG_IOMMU_API
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@ -288,7 +298,8 @@ extern void iommu_get_resv_regions(struct device *dev, struct list_head *list);
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extern void iommu_put_resv_regions(struct device *dev, struct list_head *list);
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extern int iommu_request_dm_for_dev(struct device *dev);
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extern struct iommu_resv_region *
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iommu_alloc_resv_region(phys_addr_t start, size_t length, int prot, int type);
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iommu_alloc_resv_region(phys_addr_t start, size_t length, int prot,
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enum iommu_resv_type type);
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extern int iommu_get_group_resv_regions(struct iommu_group *group,
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struct list_head *head);
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@ -328,46 +339,9 @@ extern int iommu_domain_window_enable(struct iommu_domain *domain, u32 wnd_nr,
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phys_addr_t offset, u64 size,
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int prot);
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extern void iommu_domain_window_disable(struct iommu_domain *domain, u32 wnd_nr);
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/**
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* report_iommu_fault() - report about an IOMMU fault to the IOMMU framework
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* @domain: the iommu domain where the fault has happened
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* @dev: the device where the fault has happened
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* @iova: the faulting address
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* @flags: mmu fault flags (e.g. IOMMU_FAULT_READ/IOMMU_FAULT_WRITE/...)
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*
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* This function should be called by the low-level IOMMU implementations
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* whenever IOMMU faults happen, to allow high-level users, that are
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* interested in such events, to know about them.
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*
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* This event may be useful for several possible use cases:
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* - mere logging of the event
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* - dynamic TLB/PTE loading
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* - if restarting of the faulting device is required
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*
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* Returns 0 on success and an appropriate error code otherwise (if dynamic
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* PTE/TLB loading will one day be supported, implementations will be able
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* to tell whether it succeeded or not according to this return value).
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*
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* Specifically, -ENOSYS is returned if a fault handler isn't installed
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* (though fault handlers can also return -ENOSYS, in case they want to
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* elicit the default behavior of the IOMMU drivers).
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*/
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static inline int report_iommu_fault(struct iommu_domain *domain,
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struct device *dev, unsigned long iova, int flags)
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{
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int ret = -ENOSYS;
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/*
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* if upper layers showed interest and installed a fault handler,
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* invoke it.
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*/
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if (domain->handler)
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ret = domain->handler(domain, dev, iova, flags,
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domain->handler_token);
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trace_io_page_fault(dev, iova, flags);
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return ret;
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}
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extern int report_iommu_fault(struct iommu_domain *domain, struct device *dev,
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unsigned long iova, int flags);
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static inline size_t iommu_map_sg(struct iommu_domain *domain,
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unsigned long iova, struct scatterlist *sg,
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