GitHub-Mirror/Star64_linux
2
0
Fork 0
mirror of https://github.com/Fishwaldo/Star64_linux.git synced 2025-06-06 22:58:29 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

drm/amd/display: Use DCN functions instead of DCE

Browse source 
[WHY]
DCN code should make as few references to DCE as possible

[HOW]
Copy DCE110 implementation of find_first_free_match_stream_enc_for_link
into DCN10

Signed-off-by: Wesley Chalmers <Wesley.Chalmers@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Wesley Chalmers 2019-04-24 15:29:06 -04:00 • committed by Alex Deucher
parent 78cc70b1e4
commit 2da4605dce
2 changed files with 38 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

34
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
View file

@ -1231,6 +1231,38 @@ static enum dc_status dcn10_get_default_swizzle_mode(struct dc_plane_state *plan
return result; return result;
} }
struct stream_encoder *dcn10_find_first_free_match_stream_enc_for_link(
struct resource_context *res_ctx,
const struct resource_pool *pool,
struct dc_stream_state *stream)
{
int i;
int j = -1;
struct dc_link *link = stream->link;
for (i = 0; i < pool->stream_enc_count; i++) {
if (!res_ctx->is_stream_enc_acquired[i] &&
pool->stream_enc[i]) {
/* Store first available for MST second display
* in daisy chain use case
*/
j = i;
if (pool->stream_enc[i]->id ==
link->link_enc->preferred_engine)
return pool->stream_enc[i];
}
}
/*
* For CZ and later, we can allow DIG FE and BE to differ for all display types
*/
if (j >= 0)
return pool->stream_enc[j];
return NULL;
}
static const struct dc_cap_funcs cap_funcs = { static const struct dc_cap_funcs cap_funcs = {
.get_dcc_compression_cap = dcn10_get_dcc_compression_cap .get_dcc_compression_cap = dcn10_get_dcc_compression_cap
}; };
@ -1244,7 +1276,7 @@ static const struct resource_funcs dcn10_res_pool_funcs = {
.validate_global = dcn10_validate_global, .validate_global = dcn10_validate_global,
.add_stream_to_ctx = dcn10_add_stream_to_ctx, .add_stream_to_ctx = dcn10_add_stream_to_ctx,
.get_default_swizzle_mode = dcn10_get_default_swizzle_mode, .get_default_swizzle_mode = dcn10_get_default_swizzle_mode,
.find_first_free_match_stream_enc_for_link = dce110_find_first_free_match_stream_enc_for_link .find_first_free_match_stream_enc_for_link = dcn10_find_first_free_match_stream_enc_for_link
}; };
static uint32_t read_pipe_fuses(struct dc_context *ctx) static uint32_t read_pipe_fuses(struct dc_context *ctx)

5
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.h
View file

@ -42,6 +42,11 @@ struct resource_pool *dcn10_create_resource_pool(
const struct dc_init_data *init_data, const struct dc_init_data *init_data,
struct dc *dc); struct dc *dc);
struct stream_encoder *dcn10_find_first_free_match_stream_enc_for_link(
struct resource_context *res_ctx,
const struct resource_pool *pool,
struct dc_stream_state *stream);
#endif /* __DC_RESOURCE_DCN10_H__ */ #endif /* __DC_RESOURCE_DCN10_H__ */