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MIPS: Cleanup switches with cases that can be merged

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Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
To: linux-mips@linux-mips.org
To: Andrew Morton <akpm@linux-foundation.org>
To: LKML <linux-kernel@vger.kernel.org>
Patchwork: http://patchwork.linux-mips.org/patch/860/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Roel Kluin 2010-01-20 00:59:27 +01:00 • committed by Ralf Baechle
parent 1b362e3e35
commit 2fe0626080
7 changed files with 5 additions and 27 deletions
Download patch file Download diff file Expand all files Collapse all files

8
arch/mips/include/asm/octeon/octeon-feature.h
View file

@ -99,6 +99,8 @@ static inline int octeon_has_feature(enum octeon_feature feature)
return !cvmx_fuse_read(90); return !cvmx_fuse_read(90);
case OCTEON_FEATURE_PCIE: case OCTEON_FEATURE_PCIE:
case OCTEON_FEATURE_MGMT_PORT:
case OCTEON_FEATURE_RAID:
return OCTEON_IS_MODEL(OCTEON_CN56XX) return OCTEON_IS_MODEL(OCTEON_CN56XX)
|| OCTEON_IS_MODEL(OCTEON_CN52XX); || OCTEON_IS_MODEL(OCTEON_CN52XX);
@ -110,12 +112,6 @@ static inline int octeon_has_feature(enum octeon_feature feature)
case OCTEON_FEATURE_TRA: case OCTEON_FEATURE_TRA:
return !(OCTEON_IS_MODEL(OCTEON_CN30XX) return !(OCTEON_IS_MODEL(OCTEON_CN30XX)
|| OCTEON_IS_MODEL(OCTEON_CN50XX)); || OCTEON_IS_MODEL(OCTEON_CN50XX));
case OCTEON_FEATURE_MGMT_PORT:
return OCTEON_IS_MODEL(OCTEON_CN56XX)
|| OCTEON_IS_MODEL(OCTEON_CN52XX);
case OCTEON_FEATURE_RAID:
return OCTEON_IS_MODEL(OCTEON_CN56XX)
|| OCTEON_IS_MODEL(OCTEON_CN52XX);
case OCTEON_FEATURE_USB: case OCTEON_FEATURE_USB:
return !(OCTEON_IS_MODEL(OCTEON_CN38XX) return !(OCTEON_IS_MODEL(OCTEON_CN38XX)
|| OCTEON_IS_MODEL(OCTEON_CN58XX)); || OCTEON_IS_MODEL(OCTEON_CN58XX));

3
arch/mips/kernel/cpu-probe.c
View file

@ -746,9 +746,6 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
__cpu_name[cpu] = "MIPS 4Kc"; __cpu_name[cpu] = "MIPS 4Kc";
break; break;
case PRID_IMP_4KEC: case PRID_IMP_4KEC:
c->cputype = CPU_4KEC;
__cpu_name[cpu] = "MIPS 4KEc";
break;
case PRID_IMP_4KECR2: case PRID_IMP_4KECR2:
c->cputype = CPU_4KEC; c->cputype = CPU_4KEC;
__cpu_name[cpu] = "MIPS 4KEc"; __cpu_name[cpu] = "MIPS 4KEc";

1
arch/mips/math-emu/ieee754dp.c
View file

@ -148,7 +148,6 @@ ieee754dp ieee754dp_format(int sn, int xe, u64 xm)
switch(ieee754_csr.rm) { switch(ieee754_csr.rm) {
case IEEE754_RN: case IEEE754_RN:
return ieee754dp_zero(sn);
case IEEE754_RZ: case IEEE754_RZ:
return ieee754dp_zero(sn); return ieee754dp_zero(sn);
case IEEE754_RU: /* toward +Infinity */ case IEEE754_RU: /* toward +Infinity */

1
arch/mips/math-emu/ieee754sp.c
View file

@ -149,7 +149,6 @@ ieee754sp ieee754sp_format(int sn, int xe, unsigned xm)
switch(ieee754_csr.rm) { switch(ieee754_csr.rm) {
case IEEE754_RN: case IEEE754_RN:
return ieee754sp_zero(sn);
case IEEE754_RZ: case IEEE754_RZ:
return ieee754sp_zero(sn); return ieee754sp_zero(sn);
case IEEE754_RU: /* toward +Infinity */ case IEEE754_RU: /* toward +Infinity */

6
arch/mips/pci/pci-octeon.c
View file

@ -209,16 +209,14 @@ const char *octeon_get_pci_interrupts(void)
case CVMX_BOARD_TYPE_NAO38: case CVMX_BOARD_TYPE_NAO38:
/* This is really the NAC38 */ /* This is really the NAC38 */
return "AAAAADABAAAAAAAAAAAAAAAAAAAAAAAA"; return "AAAAADABAAAAAAAAAAAAAAAAAAAAAAAA";
case CVMX_BOARD_TYPE_THUNDER:
return "";
case CVMX_BOARD_TYPE_EBH3000:
return "";
case CVMX_BOARD_TYPE_EBH3100: case CVMX_BOARD_TYPE_EBH3100:
case CVMX_BOARD_TYPE_CN3010_EVB_HS5: case CVMX_BOARD_TYPE_CN3010_EVB_HS5:
case CVMX_BOARD_TYPE_CN3005_EVB_HS5: case CVMX_BOARD_TYPE_CN3005_EVB_HS5:
return "AAABAAAAAAAAAAAAAAAAAAAAAAAAAAAA"; return "AAABAAAAAAAAAAAAAAAAAAAAAAAAAAAA";
case CVMX_BOARD_TYPE_BBGW_REF: case CVMX_BOARD_TYPE_BBGW_REF:
return "AABCD"; return "AABCD";
case CVMX_BOARD_TYPE_THUNDER:
case CVMX_BOARD_TYPE_EBH3000:
default: default:
return ""; return "";
} }

4
arch/mips/powertv/asic/asic_devices.c
View file

@ -340,10 +340,6 @@ static void __init platform_configure_usb(void)
switch (asic) { switch (asic) {
case ASIC_ZEUS: case ASIC_ZEUS:
fs_update(0x0000, 0x11, 0x02, 0);
bcm1_usb2_ctl = 0x803;
break;
case ASIC_CRONUS: case ASIC_CRONUS:
case ASIC_CRONUSLITE: case ASIC_CRONUSLITE:
fs_update(0x0000, 0x11, 0x02, 0); fs_update(0x0000, 0x11, 0x02, 0);

9
arch/mips/sgi-ip32/ip32-irq.c
View file

@ -512,10 +512,6 @@ void __init arch_init_irq(void)
"level"); "level");
break; break;
case CRIME_GBE0_IRQ ... CRIME_GBE3_IRQ:
set_irq_chip_and_handler_name(irq,
&crime_edge_interrupt, handle_edge_irq, "edge");
break;
case CRIME_CPUERR_IRQ: case CRIME_CPUERR_IRQ:
case CRIME_MEMERR_IRQ: case CRIME_MEMERR_IRQ:
set_irq_chip_and_handler_name(irq, set_irq_chip_and_handler_name(irq,
@ -523,12 +519,9 @@ void __init arch_init_irq(void)
"level"); "level");
break; break;
case CRIME_GBE0_IRQ ... CRIME_GBE3_IRQ:
case CRIME_RE_EMPTY_E_IRQ ... CRIME_RE_IDLE_E_IRQ: case CRIME_RE_EMPTY_E_IRQ ... CRIME_RE_IDLE_E_IRQ:
case CRIME_SOFT0_IRQ ... CRIME_SOFT2_IRQ: case CRIME_SOFT0_IRQ ... CRIME_SOFT2_IRQ:
set_irq_chip_and_handler_name(irq,
&crime_edge_interrupt, handle_edge_irq, "edge");
break;
case CRIME_VICE_IRQ: case CRIME_VICE_IRQ:
set_irq_chip_and_handler_name(irq, set_irq_chip_and_handler_name(irq,
&crime_edge_interrupt, handle_edge_irq, "edge"); &crime_edge_interrupt, handle_edge_irq, "edge");