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Media:wave5: Driver get clks from DTS instead of hard coding.
Signed-off-by: Som Qin <som.qin@starfivetech.com>
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parent
1466d94316
commit
2ffa2120fa
1 changed files with 8 additions and 30 deletions
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@ -25,40 +25,11 @@
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#define WAVE5_IS_ENC BIT(0)
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#define WAVE5_IS_DEC BIT(1)
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struct clk_bulk_data vpu_clks[] = {
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{ .id = "apb_clk" },
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{ .id = "axi_clk" },
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{ .id = "bpu_clk" },
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{ .id = "vce_clk" },
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{ .id = "noc_bus" },
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};
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struct wave5_match_data {
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int flags;
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const char *fw_name;
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};
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static int vpu_clk_get(struct platform_device *pdev, struct vpu_device *vpu)
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{
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struct device *dev = &pdev->dev;
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int ret;
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vpu->clks = vpu_clks;
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vpu->num_clks = ARRAY_SIZE(vpu_clks);
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vpu->resets = devm_reset_control_array_get_exclusive(dev);
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if (IS_ERR(vpu->resets)) {
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ret = PTR_ERR(vpu->resets);
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dev_err(dev, "faied to get vpu reset controls\n");
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}
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ret = devm_clk_bulk_get(dev, vpu->num_clks, vpu->clks);
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if (ret)
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dev_err(dev, "faied to get vpu clk controls\n");
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return 0;
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}
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int wave5_vpu_wait_interrupt(struct vpu_instance *inst, unsigned int timeout)
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{
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int ret;
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@ -229,13 +200,20 @@ static int wave5_vpu_probe(struct platform_device *pdev)
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dev_set_drvdata(&pdev->dev, dev);
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dev->dev = &pdev->dev;
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ret = vpu_clk_get(pdev, dev);
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ret = devm_clk_bulk_get_all(&pdev->dev, &dev->clks);
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/* continue without clock, assume externally managed */
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if (ret < 0) {
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dev_err(&pdev->dev, "Getting clocks, fail: %d\n", ret);
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return ret;
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}
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dev->num_clks = ret;
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dev->resets = devm_reset_control_array_get_exclusive(&pdev->dev);
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if (IS_ERR(dev->resets)) {
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dev_err(&pdev->dev, "faied to get vpu reset controls\n");
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return -ENODEV;
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}
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dev->sram_buf.daddr = VDI_SRAM_BASE_ADDR;
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dev->sram_buf.size = VDI_WAVE511_SRAM_SIZE;
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