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clk: renesas: rcar-gen3-cpg: Always use readl()/writel()

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The R-Car Gen3 CPG/MSSR driver uses a mix of clk_readl()/clk_writel()
and readl()/writel() to access the clock registers. Settle on the
generic readl()/writel().

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
This commit is contained in:
Geert Uytterhoeven 2016-09-21 16:47:59 +02:00
parent c1b5371b72
commit 30ad3cf00e
1 changed files with 7 additions and 7 deletions
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14
drivers/clk/renesas/rcar-gen3-cpg.c
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@ -98,7 +98,7 @@ static int cpg_sd_clock_enable(struct clk_hw *hw)
u32 val, sd_fc; u32 val, sd_fc;
unsigned int i; unsigned int i;
val = clk_readl(clock->reg); val = readl(clock->reg);
sd_fc = val & CPG_SD_FC_MASK; sd_fc = val & CPG_SD_FC_MASK;
for (i = 0; i < clock->div_num; i++) for (i = 0; i < clock->div_num; i++)
@ -111,7 +111,7 @@ static int cpg_sd_clock_enable(struct clk_hw *hw)
val &= ~(CPG_SD_STP_MASK); val &= ~(CPG_SD_STP_MASK);
val |= clock->div_table[i].val & CPG_SD_STP_MASK; val |= clock->div_table[i].val & CPG_SD_STP_MASK;
clk_writel(val, clock->reg); writel(val, clock->reg);
return 0; return 0;
} }
@ -120,14 +120,14 @@ static void cpg_sd_clock_disable(struct clk_hw *hw)
{ {
struct sd_clock *clock = to_sd_clock(hw); struct sd_clock *clock = to_sd_clock(hw);
clk_writel(clk_readl(clock->reg) | CPG_SD_STP_MASK, clock->reg); writel(readl(clock->reg) | CPG_SD_STP_MASK, clock->reg);
} }
static int cpg_sd_clock_is_enabled(struct clk_hw *hw) static int cpg_sd_clock_is_enabled(struct clk_hw *hw)
{ {
struct sd_clock *clock = to_sd_clock(hw); struct sd_clock *clock = to_sd_clock(hw);
return !(clk_readl(clock->reg) & CPG_SD_STP_MASK); return !(readl(clock->reg) & CPG_SD_STP_MASK);
} }
static unsigned long cpg_sd_clock_recalc_rate(struct clk_hw *hw, static unsigned long cpg_sd_clock_recalc_rate(struct clk_hw *hw,
@ -138,7 +138,7 @@ static unsigned long cpg_sd_clock_recalc_rate(struct clk_hw *hw,
u32 val, sd_fc; u32 val, sd_fc;
unsigned int i; unsigned int i;
val = clk_readl(clock->reg); val = readl(clock->reg);
sd_fc = val & CPG_SD_FC_MASK; sd_fc = val & CPG_SD_FC_MASK;
for (i = 0; i < clock->div_num; i++) for (i = 0; i < clock->div_num; i++)
@ -189,10 +189,10 @@ static int cpg_sd_clock_set_rate(struct clk_hw *hw, unsigned long rate,
if (i >= clock->div_num) if (i >= clock->div_num)
return -EINVAL; return -EINVAL;
val = clk_readl(clock->reg); val = readl(clock->reg);
val &= ~(CPG_SD_STP_MASK | CPG_SD_FC_MASK); val &= ~(CPG_SD_STP_MASK | CPG_SD_FC_MASK);
val |= clock->div_table[i].val & (CPG_SD_STP_MASK | CPG_SD_FC_MASK); val |= clock->div_table[i].val & (CPG_SD_STP_MASK | CPG_SD_FC_MASK);
clk_writel(val, clock->reg); writel(val, clock->reg);
return 0; return 0;
} }