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https://github.com/Fishwaldo/Star64_linux.git
synced 2025-07-23 23:32:14 +00:00
PCI: Whitespace cleanup
Fix various whitespace errors. No functional change. [bhelgaas: fix other similar problems] Signed-off-by: Ryan Desfosses <ryan@desfo.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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parent
b7fe943421
commit
3c78bc61f5
45 changed files with 513 additions and 584 deletions
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@ -48,8 +48,8 @@ static void quirk_mellanox_tavor(struct pci_dev *dev)
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{
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dev->broken_parity_status = 1; /* This device gives false positives */
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}
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MELLANOX,PCI_DEVICE_ID_MELLANOX_TAVOR,quirk_mellanox_tavor);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MELLANOX,PCI_DEVICE_ID_MELLANOX_TAVOR_BRIDGE,quirk_mellanox_tavor);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR, quirk_mellanox_tavor);
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR_BRIDGE, quirk_mellanox_tavor);
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/* Deal with broken BIOSes that neglect to enable passive release,
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which can cause problems in combination with the 82441FX/PPro MTRRs */
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@ -82,7 +82,7 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441, quirk_p
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static void quirk_isa_dma_hangs(struct pci_dev *dev)
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{
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if (!isa_dma_bridge_buggy) {
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isa_dma_bridge_buggy=1;
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isa_dma_bridge_buggy = 1;
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dev_info(&dev->dev, "Activating ISA DMA hang workarounds\n");
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}
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}
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@ -123,7 +123,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TGP_LPC, quirk
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*/
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static void quirk_nopcipci(struct pci_dev *dev)
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{
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if ((pci_pci_problems & PCIPCI_FAIL)==0) {
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if ((pci_pci_problems & PCIPCI_FAIL) == 0) {
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dev_info(&dev->dev, "Disabling direct PCI/PCI transfers\n");
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pci_pci_problems |= PCIPCI_FAIL;
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}
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@ -148,7 +148,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8151_0, quirk_nopci
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*/
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static void quirk_triton(struct pci_dev *dev)
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{
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if ((pci_pci_problems&PCIPCI_TRITON)==0) {
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if ((pci_pci_problems&PCIPCI_TRITON) == 0) {
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dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n");
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pci_pci_problems |= PCIPCI_TRITON;
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}
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@ -163,8 +163,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82439TX, quirk_
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* Made according to a windows driver based patch by George E. Breese
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* see PCI Latency Adjust on http://www.viahardware.com/download/viatweak.shtm
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* and http://www.georgebreese.com/net/software/#PCI
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* Also see http://www.au-ja.org/review-kt133a-1-en.phtml for
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* the info on which Mr Breese based his work.
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* Also see http://www.au-ja.org/review-kt133a-1-en.phtml for
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* the info on which Mr Breese based his work.
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*
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* Updated based on further information from the site and also on
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* information provided by VIA
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@ -177,14 +177,14 @@ static void quirk_vialatency(struct pci_dev *dev)
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a buggy southbridge */
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p = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, NULL);
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if (p!=NULL) {
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if (p != NULL) {
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/* 0x40 - 0x4f == 686B, 0x10 - 0x2f == 686A; thanks Dan Hollis */
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/* Check for buggy part revisions */
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if (p->revision < 0x40 || p->revision > 0x42)
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goto exit;
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} else {
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p = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, NULL);
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if (p==NULL) /* No problem parts */
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if (p == NULL) /* No problem parts */
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goto exit;
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/* Check for buggy part revisions */
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if (p->revision < 0x10 || p->revision > 0x12)
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@ -227,7 +227,7 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8361, quirk_viala
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*/
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static void quirk_viaetbf(struct pci_dev *dev)
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{
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if ((pci_pci_problems&PCIPCI_VIAETBF)==0) {
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if ((pci_pci_problems&PCIPCI_VIAETBF) == 0) {
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dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n");
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pci_pci_problems |= PCIPCI_VIAETBF;
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}
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@ -236,7 +236,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C597_0, quirk_via
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static void quirk_vsfx(struct pci_dev *dev)
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{
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if ((pci_pci_problems&PCIPCI_VSFX)==0) {
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if ((pci_pci_problems&PCIPCI_VSFX) == 0) {
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dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n");
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pci_pci_problems |= PCIPCI_VSFX;
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}
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@ -251,7 +251,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C576, quirk_vsfx)
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*/
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static void quirk_alimagik(struct pci_dev *dev)
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{
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if ((pci_pci_problems&PCIPCI_ALIMAGIK)==0) {
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if ((pci_pci_problems&PCIPCI_ALIMAGIK) == 0) {
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dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n");
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pci_pci_problems |= PCIPCI_ALIMAGIK|PCIPCI_TRITON;
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}
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@ -265,7 +265,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1651, quirk_alimagi
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*/
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static void quirk_natoma(struct pci_dev *dev)
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{
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if ((pci_pci_problems&PCIPCI_NATOMA)==0) {
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if ((pci_pci_problems&PCIPCI_NATOMA) == 0) {
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dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n");
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pci_pci_problems |= PCIPCI_NATOMA;
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}
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@ -703,7 +703,7 @@ static void quirk_via_ioapic(struct pci_dev *dev)
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tmp == 0 ? "Disa" : "Ena");
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/* Offset 0x58: External APIC IRQ output control */
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pci_write_config_byte (dev, 0x58, tmp);
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pci_write_config_byte(dev, 0x58, tmp);
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}
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, quirk_via_ioapic);
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DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, quirk_via_ioapic);
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@ -916,12 +916,12 @@ static void quirk_amd_ordering(struct pci_dev *dev)
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{
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u32 pcic;
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pci_read_config_dword(dev, 0x4C, &pcic);
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if ((pcic&6)!=6) {
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if ((pcic & 6) != 6) {
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pcic |= 6;
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dev_warn(&dev->dev, "BIOS failed to enable PCI standards compliance; fixing this error\n");
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pci_write_config_dword(dev, 0x4C, pcic);
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pci_read_config_dword(dev, 0x84, &pcic);
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pcic |= (1<<23); /* Required in this mode */
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pcic |= (1 << 23); /* Required in this mode */
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pci_write_config_dword(dev, 0x84, pcic);
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}
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}
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@ -937,7 +937,7 @@ DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FE_GATE_700C
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*/
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static void quirk_dunord(struct pci_dev *dev)
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{
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struct resource *r = &dev->resource [1];
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struct resource *r = &dev->resource[1];
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r->flags |= IORESOURCE_UNSET;
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r->start = 0;
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@ -967,11 +967,12 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TOSHIBA, 0x605, quirk_transparent_bridge)
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static void quirk_mediagx_master(struct pci_dev *dev)
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{
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u8 reg;
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pci_read_config_byte(dev, 0x41, ®);
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if (reg & 2) {
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reg &= ~2;
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dev_info(&dev->dev, "Fixup for MediaGX/Geode Slave Disconnect Boundary (0x41=0x%02x)\n", reg);
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pci_write_config_byte(dev, 0x41, reg);
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pci_write_config_byte(dev, 0x41, reg);
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}
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}
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_PCI_MASTER, quirk_mediagx_master);
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@ -1120,7 +1121,7 @@ static void asus_hides_smbus_hostbridge(struct pci_dev *dev)
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{
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if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_ASUSTEK)) {
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if (dev->device == PCI_DEVICE_ID_INTEL_82845_HB)
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switch(dev->subsystem_device) {
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switch (dev->subsystem_device) {
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case 0x8025: /* P4B-LX */
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case 0x8070: /* P4B */
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case 0x8088: /* P4B533 */
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@ -1128,14 +1129,14 @@ static void asus_hides_smbus_hostbridge(struct pci_dev *dev)
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asus_hides_smbus = 1;
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}
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else if (dev->device == PCI_DEVICE_ID_INTEL_82845G_HB)
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switch(dev->subsystem_device) {
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switch (dev->subsystem_device) {
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case 0x80b1: /* P4GE-V */
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case 0x80b2: /* P4PE */
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case 0x8093: /* P4B533-V */
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asus_hides_smbus = 1;
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}
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else if (dev->device == PCI_DEVICE_ID_INTEL_82850_HB)
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switch(dev->subsystem_device) {
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switch (dev->subsystem_device) {
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case 0x8030: /* P4T533 */
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asus_hides_smbus = 1;
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}
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@ -1175,7 +1176,7 @@ static void asus_hides_smbus_hostbridge(struct pci_dev *dev)
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}
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} else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
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if (dev->device == PCI_DEVICE_ID_INTEL_82855PM_HB)
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switch(dev->subsystem_device) {
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switch (dev->subsystem_device) {
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case 0x088C: /* HP Compaq nc8000 */
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case 0x0890: /* HP Compaq nc6000 */
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asus_hides_smbus = 1;
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@ -1192,20 +1193,20 @@ static void asus_hides_smbus_hostbridge(struct pci_dev *dev)
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case 0x12bf: /* HP xw4100 */
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asus_hides_smbus = 1;
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}
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} else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG)) {
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if (dev->device == PCI_DEVICE_ID_INTEL_82855PM_HB)
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switch(dev->subsystem_device) {
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case 0xC00C: /* Samsung P35 notebook */
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asus_hides_smbus = 1;
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}
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} else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG)) {
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if (dev->device == PCI_DEVICE_ID_INTEL_82855PM_HB)
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switch (dev->subsystem_device) {
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case 0xC00C: /* Samsung P35 notebook */
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asus_hides_smbus = 1;
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}
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} else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_COMPAQ)) {
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if (dev->device == PCI_DEVICE_ID_INTEL_82855PM_HB)
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switch(dev->subsystem_device) {
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switch (dev->subsystem_device) {
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case 0x0058: /* Compaq Evo N620c */
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asus_hides_smbus = 1;
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}
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else if (dev->device == PCI_DEVICE_ID_INTEL_82810_IG3)
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switch(dev->subsystem_device) {
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switch (dev->subsystem_device) {
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case 0xB16C: /* Compaq Deskpro EP 401963-001 (PCA# 010174) */
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/* Motherboard doesn't have Host bridge
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* subvendor/subdevice IDs, therefore checking
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asus_hides_smbus = 1;
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}
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else if (dev->device == PCI_DEVICE_ID_INTEL_82801DB_2)
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switch(dev->subsystem_device) {
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switch (dev->subsystem_device) {
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case 0x00b8: /* Compaq Evo D510 CMT */
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case 0x00b9: /* Compaq Evo D510 SFF */
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case 0x00ba: /* Compaq Evo D510 USDT */
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@ -1514,10 +1515,8 @@ static void quirk_alder_ioapic(struct pci_dev *pdev)
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/* The next five BARs all seem to be rubbish, so just clean
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* them out */
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for (i=1; i < 6; i++) {
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for (i = 1; i < 6; i++)
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memset(&pdev->resource[i], 0, sizeof(pdev->resource[i]));
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}
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EESSC, quirk_alder_ioapic);
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#endif
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@ -1552,7 +1551,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PXHV, quirk_pci
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* Some Intel PCI Express chipsets have trouble with downstream
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* device power management.
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*/
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static void quirk_intel_pcie_pm(struct pci_dev * dev)
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static void quirk_intel_pcie_pm(struct pci_dev *dev)
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{
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pci_pm_d3_delay = 120;
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dev->no_d1d2 = 1;
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@ -2189,8 +2188,7 @@ static int msi_ht_cap_enabled(struct pci_dev *dev)
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u8 flags;
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if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS,
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&flags) == 0)
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{
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&flags) == 0) {
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dev_info(&dev->dev, "Found %s HT MSI Mapping\n",
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flags & HT_MSI_FLAGS_ENABLE ?
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"enabled" : "disabled");
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@ -3040,7 +3038,7 @@ void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev)
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{
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struct pci_fixup *start, *end;
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switch(pass) {
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switch (pass) {
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case pci_fixup_early:
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start = __start_pci_fixups_early;
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end = __end_pci_fixups_early;
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