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fpga: add config complete timeout
Adding timeout for maximum allowed time for FPGA to go to operating mode after a FPGA region has been programmed. Signed-off-by: Alan Tull <atull@opensource.altera.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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2 changed files with 6 additions and 0 deletions
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@ -77,11 +77,14 @@ enum fpga_mgr_states {
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* @flags: boolean flags as defined above
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* @enable_timeout_us: maximum time to enable traffic through bridge (uSec)
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* @disable_timeout_us: maximum time to disable traffic through bridge (uSec)
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* @config_complete_timeout_us: maximum time for FPGA to switch to operating
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* status in the write_complete op.
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*/
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struct fpga_image_info {
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u32 flags;
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u32 enable_timeout_us;
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u32 disable_timeout_us;
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u32 config_complete_timeout_us;
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};
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/**
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