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mtd: spi-nor: Regroup flash parameter and settings
The scope is to move all [FLASH-SPECIFIC] parameters and settings from 'struct spi_nor' to 'struct spi_nor_flash_parameter'. 'struct spi_nor_flash_parameter' describes the hardware capabilities and associated settings of the SPI NOR flash memory. It includes legacy flash parameters and settings that can be overwritten by the spi_nor_fixups hooks, or dynamically when parsing the JESD216 Serial Flash Discoverable Parameters (SFDP) tables. All SFDP params and settings will fit inside 'struct spi_nor_flash_parameter'. Move spi_nor_hwcaps related code to avoid forward declarations. Add a forward declaration that we can't avoid: 'struct spi_nor' will be used in 'struct spi_nor_flash_parameter'. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
This commit is contained in:
Tudor Ambarus
parent
92b6d38f1a
commit
47599127a2
2 changed files with 218 additions and 194 deletions
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@ -40,71 +40,6 @@
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#define SPI_NOR_MAX_ID_LEN 6
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#define SPI_NOR_MAX_ID_LEN 6
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#define SPI_NOR_MAX_ADDR_WIDTH 4
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#define SPI_NOR_MAX_ADDR_WIDTH 4
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struct spi_nor_read_command {
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u8 num_mode_clocks;
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u8 num_wait_states;
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u8 opcode;
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enum spi_nor_protocol proto;
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};
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struct spi_nor_pp_command {
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u8 opcode;
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enum spi_nor_protocol proto;
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};
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enum spi_nor_read_command_index {
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SNOR_CMD_READ,
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SNOR_CMD_READ_FAST,
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SNOR_CMD_READ_1_1_1_DTR,
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/* Dual SPI */
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SNOR_CMD_READ_1_1_2,
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SNOR_CMD_READ_1_2_2,
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SNOR_CMD_READ_2_2_2,
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SNOR_CMD_READ_1_2_2_DTR,
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/* Quad SPI */
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SNOR_CMD_READ_1_1_4,
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SNOR_CMD_READ_1_4_4,
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SNOR_CMD_READ_4_4_4,
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SNOR_CMD_READ_1_4_4_DTR,
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/* Octal SPI */
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SNOR_CMD_READ_1_1_8,
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SNOR_CMD_READ_1_8_8,
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SNOR_CMD_READ_8_8_8,
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SNOR_CMD_READ_1_8_8_DTR,
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SNOR_CMD_READ_MAX
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};
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enum spi_nor_pp_command_index {
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SNOR_CMD_PP,
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/* Quad SPI */
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SNOR_CMD_PP_1_1_4,
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SNOR_CMD_PP_1_4_4,
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SNOR_CMD_PP_4_4_4,
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/* Octal SPI */
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SNOR_CMD_PP_1_1_8,
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SNOR_CMD_PP_1_8_8,
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SNOR_CMD_PP_8_8_8,
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SNOR_CMD_PP_MAX
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};
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struct spi_nor_flash_parameter {
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u64 size;
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u32 page_size;
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struct spi_nor_hwcaps hwcaps;
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struct spi_nor_read_command reads[SNOR_CMD_READ_MAX];
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struct spi_nor_pp_command page_programs[SNOR_CMD_PP_MAX];
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int (*quad_enable)(struct spi_nor *nor);
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};
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struct sfdp_parameter_header {
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struct sfdp_parameter_header {
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u8 id_lsb;
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u8 id_lsb;
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u8 minor;
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u8 minor;
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@ -333,135 +333,6 @@ struct spi_nor_erase_map {
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u8 uniform_erase_type;
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u8 uniform_erase_type;
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};
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};
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/**
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* struct flash_info - Forward declaration of a structure used internally by
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* spi_nor_scan()
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*/
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struct flash_info;
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/**
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* struct spi_nor - Structure for defining a the SPI NOR layer
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* @mtd: point to a mtd_info structure
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* @lock: the lock for the read/write/erase/lock/unlock operations
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* @dev: point to a spi device, or a spi nor controller device.
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* @spimem: point to the spi mem device
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* @bouncebuf: bounce buffer used when the buffer passed by the MTD
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* layer is not DMA-able
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* @bouncebuf_size: size of the bounce buffer
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* @info: spi-nor part JDEC MFR id and other info
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* @page_size: the page size of the SPI NOR
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* @addr_width: number of address bytes
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* @erase_opcode: the opcode for erasing a sector
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* @read_opcode: the read opcode
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* @read_dummy: the dummy needed by the read operation
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* @program_opcode: the program opcode
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* @sst_write_second: used by the SST write operation
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* @flags: flag options for the current SPI-NOR (SNOR_F_*)
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* @read_proto: the SPI protocol for read operations
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* @write_proto: the SPI protocol for write operations
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* @reg_proto the SPI protocol for read_reg/write_reg/erase operations
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* @erase_map: the erase map of the SPI NOR
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* @prepare: [OPTIONAL] do some preparations for the
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* read/write/erase/lock/unlock operations
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* @unprepare: [OPTIONAL] do some post work after the
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* read/write/erase/lock/unlock operations
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* @read_reg: [DRIVER-SPECIFIC] read out the register
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* @write_reg: [DRIVER-SPECIFIC] write data to the register
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* @read: [DRIVER-SPECIFIC] read data from the SPI NOR
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* @write: [DRIVER-SPECIFIC] write data to the SPI NOR
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* @erase: [DRIVER-SPECIFIC] erase a sector of the SPI NOR
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* at the offset @offs; if not provided by the driver,
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* spi-nor will send the erase opcode via write_reg()
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* @flash_lock: [FLASH-SPECIFIC] lock a region of the SPI NOR
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* @flash_unlock: [FLASH-SPECIFIC] unlock a region of the SPI NOR
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* @flash_is_locked: [FLASH-SPECIFIC] check if a region of the SPI NOR is
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* completely locked
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* @quad_enable: [FLASH-SPECIFIC] enables SPI NOR quad mode
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* @clear_sr_bp: [FLASH-SPECIFIC] clears the Block Protection Bits from
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* the SPI NOR Status Register.
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* @priv: the private data
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*/
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struct spi_nor {
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struct mtd_info mtd;
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struct mutex lock;
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struct device *dev;
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struct spi_mem *spimem;
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u8 *bouncebuf;
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size_t bouncebuf_size;
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const struct flash_info *info;
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u32 page_size;
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u8 addr_width;
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u8 erase_opcode;
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u8 read_opcode;
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u8 read_dummy;
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u8 program_opcode;
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enum spi_nor_protocol read_proto;
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enum spi_nor_protocol write_proto;
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enum spi_nor_protocol reg_proto;
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bool sst_write_second;
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u32 flags;
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struct spi_nor_erase_map erase_map;
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int (*prepare)(struct spi_nor *nor, enum spi_nor_ops ops);
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void (*unprepare)(struct spi_nor *nor, enum spi_nor_ops ops);
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int (*read_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
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int (*write_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
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ssize_t (*read)(struct spi_nor *nor, loff_t from,
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size_t len, u_char *read_buf);
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ssize_t (*write)(struct spi_nor *nor, loff_t to,
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size_t len, const u_char *write_buf);
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int (*erase)(struct spi_nor *nor, loff_t offs);
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int (*flash_lock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
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int (*flash_unlock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
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int (*flash_is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len);
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int (*quad_enable)(struct spi_nor *nor);
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int (*clear_sr_bp)(struct spi_nor *nor);
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void *priv;
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};
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static u64 __maybe_unused
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spi_nor_region_is_last(const struct spi_nor_erase_region *region)
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{
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return region->offset & SNOR_LAST_REGION;
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}
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static u64 __maybe_unused
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spi_nor_region_end(const struct spi_nor_erase_region *region)
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{
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return (region->offset & ~SNOR_ERASE_FLAGS_MASK) + region->size;
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}
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static void __maybe_unused
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spi_nor_region_mark_end(struct spi_nor_erase_region *region)
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{
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region->offset |= SNOR_LAST_REGION;
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}
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static void __maybe_unused
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spi_nor_region_mark_overlay(struct spi_nor_erase_region *region)
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{
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region->offset |= SNOR_OVERLAID_REGION;
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}
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static bool __maybe_unused spi_nor_has_uniform_erase(const struct spi_nor *nor)
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{
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return !!nor->erase_map.uniform_erase_type;
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}
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static inline void spi_nor_set_flash_node(struct spi_nor *nor,
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struct device_node *np)
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{
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mtd_set_of_node(&nor->mtd, np);
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}
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static inline struct device_node *spi_nor_get_flash_node(struct spi_nor *nor)
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{
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return mtd_get_of_node(&nor->mtd);
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}
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/**
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/**
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* struct spi_nor_hwcaps - Structure for describing the hardware capabilies
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* struct spi_nor_hwcaps - Structure for describing the hardware capabilies
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* supported by the SPI controller (bus master).
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* supported by the SPI controller (bus master).
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@ -537,6 +408,224 @@ struct spi_nor_hwcaps {
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#define SNOR_HWCAPS_ALL (SNOR_HWCAPS_READ_MASK | \
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#define SNOR_HWCAPS_ALL (SNOR_HWCAPS_READ_MASK | \
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SNOR_HWCAPS_PP_MASK)
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SNOR_HWCAPS_PP_MASK)
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struct spi_nor_read_command {
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u8 num_mode_clocks;
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u8 num_wait_states;
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u8 opcode;
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enum spi_nor_protocol proto;
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};
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struct spi_nor_pp_command {
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u8 opcode;
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enum spi_nor_protocol proto;
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};
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enum spi_nor_read_command_index {
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SNOR_CMD_READ,
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SNOR_CMD_READ_FAST,
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SNOR_CMD_READ_1_1_1_DTR,
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/* Dual SPI */
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SNOR_CMD_READ_1_1_2,
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SNOR_CMD_READ_1_2_2,
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SNOR_CMD_READ_2_2_2,
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SNOR_CMD_READ_1_2_2_DTR,
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/* Quad SPI */
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SNOR_CMD_READ_1_1_4,
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SNOR_CMD_READ_1_4_4,
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SNOR_CMD_READ_4_4_4,
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SNOR_CMD_READ_1_4_4_DTR,
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/* Octal SPI */
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SNOR_CMD_READ_1_1_8,
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SNOR_CMD_READ_1_8_8,
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SNOR_CMD_READ_8_8_8,
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SNOR_CMD_READ_1_8_8_DTR,
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SNOR_CMD_READ_MAX
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};
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enum spi_nor_pp_command_index {
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SNOR_CMD_PP,
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/* Quad SPI */
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SNOR_CMD_PP_1_1_4,
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SNOR_CMD_PP_1_4_4,
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SNOR_CMD_PP_4_4_4,
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/* Octal SPI */
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SNOR_CMD_PP_1_1_8,
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SNOR_CMD_PP_1_8_8,
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SNOR_CMD_PP_8_8_8,
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SNOR_CMD_PP_MAX
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};
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/* Forward declaration that will be used in 'struct spi_nor_flash_parameter' */
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struct spi_nor;
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/**
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* struct spi_nor_flash_parameter - SPI NOR flash parameters and settings.
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* Includes legacy flash parameters and settings that can be overwritten
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* by the spi_nor_fixups hooks, or dynamically when parsing the JESD216
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* Serial Flash Discoverable Parameters (SFDP) tables.
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*
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* @size: the flash memory density in bytes.
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* @page_size: the page size of the SPI NOR flash memory.
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* @hwcaps: describes the read and page program hardware
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* capabilities.
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* @reads: read capabilities ordered by priority: the higher index
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* in the array, the higher priority.
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* @page_programs: page program capabilities ordered by priority: the
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* higher index in the array, the higher priority.
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* @quad_enable: enables SPI NOR quad mode.
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*/
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struct spi_nor_flash_parameter {
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u64 size;
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u32 page_size;
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struct spi_nor_hwcaps hwcaps;
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struct spi_nor_read_command reads[SNOR_CMD_READ_MAX];
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struct spi_nor_pp_command page_programs[SNOR_CMD_PP_MAX];
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int (*quad_enable)(struct spi_nor *nor);
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};
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/**
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* struct flash_info - Forward declaration of a structure used internally by
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* spi_nor_scan()
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*/
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struct flash_info;
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/**
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* struct spi_nor - Structure for defining a the SPI NOR layer
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* @mtd: point to a mtd_info structure
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* @lock: the lock for the read/write/erase/lock/unlock operations
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* @dev: point to a spi device, or a spi nor controller device.
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* @spimem: point to the spi mem device
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* @bouncebuf: bounce buffer used when the buffer passed by the MTD
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* layer is not DMA-able
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* @bouncebuf_size: size of the bounce buffer
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* @info: spi-nor part JDEC MFR id and other info
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* @page_size: the page size of the SPI NOR
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* @addr_width: number of address bytes
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* @erase_opcode: the opcode for erasing a sector
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* @read_opcode: the read opcode
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* @read_dummy: the dummy needed by the read operation
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* @program_opcode: the program opcode
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* @sst_write_second: used by the SST write operation
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* @flags: flag options for the current SPI-NOR (SNOR_F_*)
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* @read_proto: the SPI protocol for read operations
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* @write_proto: the SPI protocol for write operations
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* @reg_proto the SPI protocol for read_reg/write_reg/erase operations
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* @erase_map: the erase map of the SPI NOR
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* @prepare: [OPTIONAL] do some preparations for the
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* read/write/erase/lock/unlock operations
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* @unprepare: [OPTIONAL] do some post work after the
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* read/write/erase/lock/unlock operations
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* @read_reg: [DRIVER-SPECIFIC] read out the register
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* @write_reg: [DRIVER-SPECIFIC] write data to the register
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* @read: [DRIVER-SPECIFIC] read data from the SPI NOR
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* @write: [DRIVER-SPECIFIC] write data to the SPI NOR
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* @erase: [DRIVER-SPECIFIC] erase a sector of the SPI NOR
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* at the offset @offs; if not provided by the driver,
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* spi-nor will send the erase opcode via write_reg()
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* @flash_lock: [FLASH-SPECIFIC] lock a region of the SPI NOR
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* @flash_unlock: [FLASH-SPECIFIC] unlock a region of the SPI NOR
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* @flash_is_locked: [FLASH-SPECIFIC] check if a region of the SPI NOR is
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* completely locked
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||||||
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* @quad_enable: [FLASH-SPECIFIC] enables SPI NOR quad mode
|
||||||
|
* @clear_sr_bp: [FLASH-SPECIFIC] clears the Block Protection Bits from
|
||||||
|
* the SPI NOR Status Register.
|
||||||
|
* @params: [FLASH-SPECIFIC] SPI-NOR flash parameters and settings.
|
||||||
|
* The structure includes legacy flash parameters and
|
||||||
|
* settings that can be overwritten by the spi_nor_fixups
|
||||||
|
* hooks, or dynamically when parsing the SFDP tables.
|
||||||
|
* @priv: the private data
|
||||||
|
*/
|
||||||
|
struct spi_nor {
|
||||||
|
struct mtd_info mtd;
|
||||||
|
struct mutex lock;
|
||||||
|
struct device *dev;
|
||||||
|
struct spi_mem *spimem;
|
||||||
|
u8 *bouncebuf;
|
||||||
|
size_t bouncebuf_size;
|
||||||
|
const struct flash_info *info;
|
||||||
|
u32 page_size;
|
||||||
|
u8 addr_width;
|
||||||
|
u8 erase_opcode;
|
||||||
|
u8 read_opcode;
|
||||||
|
u8 read_dummy;
|
||||||
|
u8 program_opcode;
|
||||||
|
enum spi_nor_protocol read_proto;
|
||||||
|
enum spi_nor_protocol write_proto;
|
||||||
|
enum spi_nor_protocol reg_proto;
|
||||||
|
bool sst_write_second;
|
||||||
|
u32 flags;
|
||||||
|
struct spi_nor_erase_map erase_map;
|
||||||
|
|
||||||
|
int (*prepare)(struct spi_nor *nor, enum spi_nor_ops ops);
|
||||||
|
void (*unprepare)(struct spi_nor *nor, enum spi_nor_ops ops);
|
||||||
|
int (*read_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
|
||||||
|
int (*write_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
|
||||||
|
|
||||||
|
ssize_t (*read)(struct spi_nor *nor, loff_t from,
|
||||||
|
size_t len, u_char *read_buf);
|
||||||
|
ssize_t (*write)(struct spi_nor *nor, loff_t to,
|
||||||
|
size_t len, const u_char *write_buf);
|
||||||
|
int (*erase)(struct spi_nor *nor, loff_t offs);
|
||||||
|
|
||||||
|
int (*flash_lock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
|
||||||
|
int (*flash_unlock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
|
||||||
|
int (*flash_is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len);
|
||||||
|
int (*quad_enable)(struct spi_nor *nor);
|
||||||
|
int (*clear_sr_bp)(struct spi_nor *nor);
|
||||||
|
struct spi_nor_flash_parameter params;
|
||||||
|
|
||||||
|
void *priv;
|
||||||
|
};
|
||||||
|
|
||||||
|
static u64 __maybe_unused
|
||||||
|
spi_nor_region_is_last(const struct spi_nor_erase_region *region)
|
||||||
|
{
|
||||||
|
return region->offset & SNOR_LAST_REGION;
|
||||||
|
}
|
||||||
|
|
||||||
|
static u64 __maybe_unused
|
||||||
|
spi_nor_region_end(const struct spi_nor_erase_region *region)
|
||||||
|
{
|
||||||
|
return (region->offset & ~SNOR_ERASE_FLAGS_MASK) + region->size;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void __maybe_unused
|
||||||
|
spi_nor_region_mark_end(struct spi_nor_erase_region *region)
|
||||||
|
{
|
||||||
|
region->offset |= SNOR_LAST_REGION;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void __maybe_unused
|
||||||
|
spi_nor_region_mark_overlay(struct spi_nor_erase_region *region)
|
||||||
|
{
|
||||||
|
region->offset |= SNOR_OVERLAID_REGION;
|
||||||
|
}
|
||||||
|
|
||||||
|
static bool __maybe_unused spi_nor_has_uniform_erase(const struct spi_nor *nor)
|
||||||
|
{
|
||||||
|
return !!nor->erase_map.uniform_erase_type;
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline void spi_nor_set_flash_node(struct spi_nor *nor,
|
||||||
|
struct device_node *np)
|
||||||
|
{
|
||||||
|
mtd_set_of_node(&nor->mtd, np);
|
||||||
|
}
|
||||||
|
|
||||||
|
static inline struct device_node *spi_nor_get_flash_node(struct spi_nor *nor)
|
||||||
|
{
|
||||||
|
return mtd_get_of_node(&nor->mtd);
|
||||||
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* spi_nor_scan() - scan the SPI NOR
|
* spi_nor_scan() - scan the SPI NOR
|
||||||
* @nor: the spi_nor structure
|
* @nor: the spi_nor structure
|
||||||
|
|
|
||||||
Loading…
Add table
Add a link
Reference in a new issue