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RISC-V: Add StarFive JH7100 audio clock node

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Add device tree node for the audio clocks on the StarFive JH7100 RISC-V
SoC.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
This commit is contained in:
Emil Renner Berthing 2021-11-20 17:13:22 +01:00 • committed by Emil Renner Berthing
parent 003c3800d8
commit 484ef7ec50
1 changed files with 10 additions and 0 deletions
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10
arch/riscv/boot/dts/starfive/jh7100.dtsi
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@ -133,6 +133,16 @@
riscv,ndev = <133>;
};
audclk: clock-controller@10480000 {
compatible = "starfive,jh7100-audclk";
reg = <0x0 0x10480000 0x0 0x10000>;
clocks = <&clkgen JH7100_CLK_AUDIO_SRC>,
<&clkgen JH7100_CLK_AUDIO_12288>,
<&clkgen JH7100_CLK_DOM7AHB_BUS>;
clock-names = "audio_src", "audio_12288", "dom7ahb_bus";
#clock-cells = <1>;
};
clkgen: clock-controller@11800000 {
compatible = "starfive,jh7100-clkgen";
reg = <0x0 0x11800000 0x0 0x10000>;