mirror of
https://github.com/Fishwaldo/Star64_linux.git
synced 2025-06-19 21:21:09 +00:00
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (119 commits) MIPS: Delete unused function add_temporary_entry. MIPS: Set default pci cache line size. MIPS: Flush huge TLB MIPS: Octeon: Remove SYS_SUPPORTS_HIGHMEM. MIPS: Octeon: Add support for OCTEON II PCIe MIPS: Octeon: Update PCI Latency timer and enable more error reporting. MIPS: Alchemy: Update cpu-feature-overrides MIPS: Alchemy: db1200: Improve PB1200 detection. MIPS: Alchemy: merge Au1000 and Au1300-style IRQ controller code. MIPS: Alchemy: chain IRQ controllers to MIPS IRQ controller MIPS: Alchemy: irq: register pm at irq init time MIPS: Alchemy: Touchscreen support on DB1100 MIPS: Alchemy: Hook up IrDA on DB1000/DB1100 net/irda: convert au1k_ir to platform driver. MIPS: Alchemy: remove unused board headers MTD: nand: make au1550nd.c a platform_driver MIPS: Netlogic: Mark Netlogic chips as SMT capable MIPS: Netlogic: Add support for XLP 3XX cores MIPS: Netlogic: Merge some of XLR/XLP wakup code MIPS: Netlogic: Add default XLP config. ... Fix up trivial conflicts in arch/mips/kernel/{perf_event_mipsxx.c, traps.c} and drivers/tty/serial/Makefile
This commit is contained in:
commit
4964e0664c
354 changed files with 23260 additions and 8484 deletions
|
@ -4,8 +4,11 @@
|
|||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
* Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
|
||||
* Copyright (C) 2003, 04, 11 Ralf Baechle (ralf@linux-mips.org)
|
||||
* Copyright (C) 2011 Wind River Systems,
|
||||
* written by Ralf Baechle (ralf@linux-mips.org)
|
||||
*/
|
||||
#include <linux/bug.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/bootmem.h>
|
||||
|
@ -14,6 +17,8 @@
|
|||
#include <linux/types.h>
|
||||
#include <linux/pci.h>
|
||||
|
||||
#include <asm/cpu-info.h>
|
||||
|
||||
/*
|
||||
* Indicate whether we respect the PCI setup left by the firmware.
|
||||
*
|
||||
|
@ -157,10 +162,32 @@ out:
|
|||
"Skipping PCI bus scan due to resource conflict\n");
|
||||
}
|
||||
|
||||
static void __init pcibios_set_cache_line_size(void)
|
||||
{
|
||||
struct cpuinfo_mips *c = ¤t_cpu_data;
|
||||
unsigned int lsize;
|
||||
|
||||
/*
|
||||
* Set PCI cacheline size to that of the highest level in the
|
||||
* cache hierarchy.
|
||||
*/
|
||||
lsize = c->dcache.linesz;
|
||||
lsize = c->scache.linesz ? : lsize;
|
||||
lsize = c->tcache.linesz ? : lsize;
|
||||
|
||||
BUG_ON(!lsize);
|
||||
|
||||
pci_dfl_cache_line_size = lsize >> 2;
|
||||
|
||||
pr_debug("PCI: pci_cache_line_size set to %d bytes\n", lsize);
|
||||
}
|
||||
|
||||
static int __init pcibios_init(void)
|
||||
{
|
||||
struct pci_controller *hose;
|
||||
|
||||
pcibios_set_cache_line_size();
|
||||
|
||||
/* Scan all of the recorded PCI controllers. */
|
||||
for (hose = hose_head; hose; hose = hose->next)
|
||||
pcibios_scanbus(hose);
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue