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dt-bindings: soc: add i.MX93 SRC
Add bindings for i.MX93 System Reset Controller(SRC). SRC supports resets and power gating for mixes. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml
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Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/imx/fsl,imx93-src.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP i.MX93 System Reset Controller
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maintainers:
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- Peng Fan <peng.fan@nxp.com>
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description: |
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The System Reset Controller (SRC) is responsible for the generation of
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all the system reset signals and boot argument latching.
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Its main functions are as follows,
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- Deals with all global system reset sources from other modules,
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and generates global system reset.
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- Responsible for power gating of MIXs (Slices) and their memory
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low power control.
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properties:
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compatible:
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items:
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- const: fsl,imx93-src
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- const: syscon
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reg:
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maxItems: 1
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ranges: true
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'#address-cells':
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const: 1
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'#size-cells':
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const: 1
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patternProperties:
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"power-domain@[0-9a-f]+$":
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type: object
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properties:
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compatible:
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items:
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- const: fsl,imx93-src-slice
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'#power-domain-cells':
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const: 0
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reg:
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items:
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- description: mix slice register region
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- description: mem slice register region
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clocks:
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description: |
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A number of phandles to clocks that need to be enabled
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during domain power-up sequencing to ensure reset
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propagation into devices located inside this power domain.
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minItems: 1
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maxItems: 5
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required:
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- compatible
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- '#power-domain-cells'
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- reg
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required:
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- compatible
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- reg
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- ranges
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- '#address-cells'
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- '#size-cells'
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/imx93-clock.h>
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system-controller@44460000 {
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compatible = "fsl,imx93-src", "syscon";
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reg = <0x44460000 0x10000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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mediamix: power-domain@0 {
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compatible = "fsl,imx93-src-slice";
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reg = <0x44462400 0x400>, <0x44465800 0x400>;
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#power-domain-cells = <0>;
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clocks = <&clk IMX93_CLK_MEDIA_AXI>,
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<&clk IMX93_CLK_MEDIA_APB>;
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};
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};
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