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phy: Add Tegra XUSB pad controller support
Add a new driver for the XUSB pad controller found on NVIDIA Tegra SoCs. This hardware block used to be exposed as a pin controller, but it turns out that this isn't a good fit. The new driver and DT binding much more accurately describe the hardware and are more flexible in supporting new SoC generations. Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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9 changed files with 3245 additions and 16 deletions
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include/linux/phy/tegra/xusb.h
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include/linux/phy/tegra/xusb.h
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/*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef PHY_TEGRA_XUSB_H
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#define PHY_TEGRA_XUSB_H
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struct tegra_xusb_padctl;
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struct device;
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struct tegra_xusb_padctl *tegra_xusb_padctl_get(struct device *dev);
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void tegra_xusb_padctl_put(struct tegra_xusb_padctl *padctl);
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int tegra_xusb_padctl_usb3_save_context(struct tegra_xusb_padctl *padctl,
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unsigned int port);
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int tegra_xusb_padctl_hsic_set_idle(struct tegra_xusb_padctl *padctl,
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unsigned int port, bool idle);
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int tegra_xusb_padctl_usb3_set_lfps_detect(struct tegra_xusb_padctl *padctl,
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unsigned int port, bool enable);
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#endif /* PHY_TEGRA_XUSB_H */
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