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usb/xhci: move xhci_gen_setup() away from -pci.
xhci_gen_setup() is generic so it can be used to perform the bare xhci setup even on non-pci based platform. The typedef for the function pointer is moved into the headerfile Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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da3c9c4fc5
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552e0c4f12
3 changed files with 91 additions and 91 deletions
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@ -51,97 +51,6 @@ static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
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return 0;
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return 0;
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}
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}
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typedef void (*xhci_get_quirks_t)(struct device *, struct xhci_hcd *);
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static int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
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{
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struct xhci_hcd *xhci;
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struct device *dev = hcd->self.controller;
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int retval;
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u32 temp;
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hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;
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if (usb_hcd_is_primary_hcd(hcd)) {
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xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
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if (!xhci)
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return -ENOMEM;
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*((struct xhci_hcd **) hcd->hcd_priv) = xhci;
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xhci->main_hcd = hcd;
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/* Mark the first roothub as being USB 2.0.
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* The xHCI driver will register the USB 3.0 roothub.
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*/
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hcd->speed = HCD_USB2;
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hcd->self.root_hub->speed = USB_SPEED_HIGH;
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/*
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* USB 2.0 roothub under xHCI has an integrated TT,
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* (rate matching hub) as opposed to having an OHCI/UHCI
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* companion controller.
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*/
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hcd->has_tt = 1;
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} else {
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/* xHCI private pointer was set in xhci_pci_probe for the second
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* registered roothub.
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*/
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xhci = hcd_to_xhci(hcd);
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temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
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if (HCC_64BIT_ADDR(temp)) {
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xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
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dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
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} else {
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dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
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}
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return 0;
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}
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xhci->cap_regs = hcd->regs;
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xhci->op_regs = hcd->regs +
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HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
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xhci->run_regs = hcd->regs +
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(xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
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/* Cache read-only capability registers */
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xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
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xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
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xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
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xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
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xhci->hci_version = HC_VERSION(xhci->hcc_params);
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xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
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xhci_print_registers(xhci);
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get_quirks(dev, xhci);
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/* Make sure the HC is halted. */
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retval = xhci_halt(xhci);
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if (retval)
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goto error;
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xhci_dbg(xhci, "Resetting HCD\n");
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/* Reset the internal HC memory state and registers. */
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retval = xhci_reset(xhci);
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if (retval)
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goto error;
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xhci_dbg(xhci, "Reset complete\n");
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temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
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if (HCC_64BIT_ADDR(temp)) {
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xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
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dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
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} else {
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dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
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}
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xhci_dbg(xhci, "Calling HCD init\n");
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/* Initialize HCD and host controller data structures. */
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retval = xhci_init(hcd);
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if (retval)
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goto error;
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xhci_dbg(xhci, "Called HCD init\n");
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return 0;
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error:
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kfree(xhci);
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return retval;
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}
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static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
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static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
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{
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{
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struct pci_dev *pdev = to_pci_dev(dev);
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struct pci_dev *pdev = to_pci_dev(dev);
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@ -3944,6 +3944,95 @@ int xhci_get_frame(struct usb_hcd *hcd)
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return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
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return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
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}
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}
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int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
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{
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struct xhci_hcd *xhci;
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struct device *dev = hcd->self.controller;
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int retval;
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u32 temp;
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hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;
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if (usb_hcd_is_primary_hcd(hcd)) {
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xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
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if (!xhci)
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return -ENOMEM;
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*((struct xhci_hcd **) hcd->hcd_priv) = xhci;
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xhci->main_hcd = hcd;
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/* Mark the first roothub as being USB 2.0.
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* The xHCI driver will register the USB 3.0 roothub.
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*/
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hcd->speed = HCD_USB2;
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hcd->self.root_hub->speed = USB_SPEED_HIGH;
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/*
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* USB 2.0 roothub under xHCI has an integrated TT,
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* (rate matching hub) as opposed to having an OHCI/UHCI
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* companion controller.
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*/
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hcd->has_tt = 1;
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} else {
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/* xHCI private pointer was set in xhci_pci_probe for the second
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* registered roothub.
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*/
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xhci = hcd_to_xhci(hcd);
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temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
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if (HCC_64BIT_ADDR(temp)) {
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xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
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dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
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} else {
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dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
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}
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return 0;
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}
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xhci->cap_regs = hcd->regs;
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xhci->op_regs = hcd->regs +
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HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
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xhci->run_regs = hcd->regs +
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(xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
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/* Cache read-only capability registers */
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xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
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xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
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xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
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xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
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xhci->hci_version = HC_VERSION(xhci->hcc_params);
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xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
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xhci_print_registers(xhci);
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get_quirks(dev, xhci);
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/* Make sure the HC is halted. */
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retval = xhci_halt(xhci);
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if (retval)
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goto error;
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xhci_dbg(xhci, "Resetting HCD\n");
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/* Reset the internal HC memory state and registers. */
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retval = xhci_reset(xhci);
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if (retval)
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goto error;
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xhci_dbg(xhci, "Reset complete\n");
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temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
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if (HCC_64BIT_ADDR(temp)) {
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xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
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dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
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} else {
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dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
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}
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xhci_dbg(xhci, "Calling HCD init\n");
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/* Initialize HCD and host controller data structures. */
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retval = xhci_init(hcd);
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if (retval)
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goto error;
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xhci_dbg(xhci, "Called HCD init\n");
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return 0;
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error:
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kfree(xhci);
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return retval;
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}
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MODULE_DESCRIPTION(DRIVER_DESC);
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MODULE_DESCRIPTION(DRIVER_DESC);
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MODULE_AUTHOR(DRIVER_AUTHOR);
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MODULE_AUTHOR(DRIVER_AUTHOR);
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MODULE_LICENSE("GPL");
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MODULE_LICENSE("GPL");
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@ -1647,6 +1647,7 @@ void xhci_unregister_pci(void);
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#endif
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#endif
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/* xHCI host controller glue */
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/* xHCI host controller glue */
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typedef void (*xhci_get_quirks_t)(struct device *, struct xhci_hcd *);
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void xhci_quiesce(struct xhci_hcd *xhci);
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void xhci_quiesce(struct xhci_hcd *xhci);
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int xhci_halt(struct xhci_hcd *xhci);
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int xhci_halt(struct xhci_hcd *xhci);
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int xhci_reset(struct xhci_hcd *xhci);
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int xhci_reset(struct xhci_hcd *xhci);
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@ -1654,6 +1655,7 @@ int xhci_init(struct usb_hcd *hcd);
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int xhci_run(struct usb_hcd *hcd);
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int xhci_run(struct usb_hcd *hcd);
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void xhci_stop(struct usb_hcd *hcd);
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void xhci_stop(struct usb_hcd *hcd);
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void xhci_shutdown(struct usb_hcd *hcd);
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void xhci_shutdown(struct usb_hcd *hcd);
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int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks);
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#ifdef CONFIG_PM
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#ifdef CONFIG_PM
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int xhci_suspend(struct xhci_hcd *xhci);
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int xhci_suspend(struct xhci_hcd *xhci);
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