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drm/amd/display: Add stereo mux and dig programming calls for dcn21

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[Why]
The earlier patch "Hook up calls to do stereo mux and dig programming..."
doesn't include update for dcn21.

[How]
Align dcn21 gpio settings with updated stereo control interface.

Signed-off-by: Roman Li <Roman.Li@amd.com>
Acked-by: Aaron Liu <aaron.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Roman Li 2019-09-04 17:23:11 -04:00 • committed by Alex Deucher
parent 945b584c94
commit 59b263620c
2 changed files with 36 additions and 5 deletions
Download patch file Download diff file Expand all files Collapse all files

38
drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c
View file

@ -35,12 +35,10 @@
#include "hw_factory_dcn21.h" #include "hw_factory_dcn21.h"
#include "dcn/dcn_2_1_0_offset.h" #include "dcn/dcn_2_1_0_offset.h"
#include "dcn/dcn_2_1_0_sh_mask.h" #include "dcn/dcn_2_1_0_sh_mask.h"
#include "renoir_ip_offset.h" #include "renoir_ip_offset.h"
#include "reg_helper.h" #include "reg_helper.h"
#include "../hpd_regs.h" #include "../hpd_regs.h"
/* begin ********************* /* begin *********************
@ -136,6 +134,39 @@ static const struct ddc_sh_mask ddc_mask[] = {
DDC_MASK_SH_LIST_DCN2(_MASK, 6) DDC_MASK_SH_LIST_DCN2(_MASK, 6)
}; };
#include "../generic_regs.h"
/* set field name */
#define SF_GENERIC(reg_name, field_name, post_fix)\
.field_name = reg_name ## __ ## field_name ## post_fix
#define generic_regs(id) \
{\
GENERIC_REG_LIST(id)\
}
static const struct generic_registers generic_regs[] = {
generic_regs(A),
};
static const struct generic_sh_mask generic_shift[] = {
GENERIC_MASK_SH_LIST(__SHIFT, A),
};
static const struct generic_sh_mask generic_mask[] = {
GENERIC_MASK_SH_LIST(_MASK, A),
};
static void define_generic_registers(struct hw_gpio_pin *pin, uint32_t en)
{
struct hw_generic *generic = HW_GENERIC_FROM_BASE(pin);
generic->regs = &generic_regs[en];
generic->shifts = &generic_shift[en];
generic->masks = &generic_mask[en];
generic->base.regs = &generic_regs[en].gpio;
}
static void define_ddc_registers( static void define_ddc_registers(
struct hw_gpio_pin *pin, struct hw_gpio_pin *pin,
uint32_t en) uint32_t en)
@ -181,7 +212,8 @@ static const struct hw_factory_funcs funcs = {
.get_hpd_pin = dal_hw_hpd_get_pin, .get_hpd_pin = dal_hw_hpd_get_pin,
.get_generic_pin = dal_hw_generic_get_pin, .get_generic_pin = dal_hw_generic_get_pin,
.define_hpd_registers = define_hpd_registers, .define_hpd_registers = define_hpd_registers,
.define_ddc_registers = define_ddc_registers .define_ddc_registers = define_ddc_registers,
.define_generic_registers = define_generic_registers
}; };
/* /*
* dal_hw_factory_dcn10_init * dal_hw_factory_dcn10_init

3
drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c
View file

@ -58,7 +58,6 @@
#define SF_HPD(reg_name, field_name, post_fix)\ #define SF_HPD(reg_name, field_name, post_fix)\
.field_name = reg_name ## __ ## field_name ## post_fix .field_name = reg_name ## __ ## field_name ## post_fix
/* macros to expend register list macro defined in HW object header file /* macros to expend register list macro defined in HW object header file
* end *********************/ * end *********************/
@ -71,7 +70,7 @@ static bool offset_to_id(
{ {
switch (offset) { switch (offset) {
/* GENERIC */ /* GENERIC */
case REG(DC_GENERICA): case REG(DC_GPIO_GENERIC_A):
*id = GPIO_ID_GENERIC; *id = GPIO_ID_GENERIC;
switch (mask) { switch (mask) {
case DC_GPIO_GENERIC_A__DC_GPIO_GENERICA_A_MASK: case DC_GPIO_GENERIC_A__DC_GPIO_GENERICA_A_MASK: