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drm/amdgpu: allow framebuffer in GART memory as well
On CZ and newer APUs we can pin the fb into GART as well as VRAM. v2: Don't enable gpu_vm_support for Raven yet since it leads to a black screen. Need to debug this further before enabling. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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c8553f4bd2
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4 changed files with 29 additions and 7 deletions
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@ -29,6 +29,7 @@
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#include "amdgpu_i2c.h"
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#include "atom.h"
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#include "amdgpu_connectors.h"
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#include "amdgpu_display.h"
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#include <asm/div64.h>
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#include <linux/pm_runtime.h>
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@ -189,7 +190,7 @@ int amdgpu_crtc_page_flip_target(struct drm_crtc *crtc,
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goto cleanup;
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}
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r = amdgpu_bo_pin(new_abo, AMDGPU_GEM_DOMAIN_VRAM, &base);
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r = amdgpu_bo_pin(new_abo, amdgpu_display_framebuffer_domains(adev), &base);
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if (unlikely(r != 0)) {
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DRM_ERROR("failed to pin new abo buffer before flip\n");
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goto unreserve;
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@ -502,6 +503,17 @@ static const struct drm_framebuffer_funcs amdgpu_fb_funcs = {
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.create_handle = amdgpu_user_framebuffer_create_handle,
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};
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uint32_t amdgpu_display_framebuffer_domains(struct amdgpu_device *adev)
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{
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uint32_t domain = AMDGPU_GEM_DOMAIN_VRAM;
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if (adev->asic_type >= CHIP_CARRIZO && adev->asic_type < CHIP_RAVEN &&
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adev->flags & AMD_IS_APU)
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domain |= AMDGPU_GEM_DOMAIN_GTT;
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return domain;
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}
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int
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amdgpu_framebuffer_init(struct drm_device *dev,
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struct amdgpu_framebuffer *rfb,
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@ -23,6 +23,7 @@
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#ifndef __AMDGPU_DISPLAY_H__
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#define __AMDGPU_DISPLAY_H__
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uint32_t amdgpu_display_framebuffer_domains(struct amdgpu_device *adev);
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struct drm_framebuffer *
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amdgpu_user_framebuffer_create(struct drm_device *dev,
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struct drm_file *file_priv,
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@ -38,6 +38,8 @@
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#include <linux/vga_switcheroo.h>
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#include "amdgpu_display.h"
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/* object hierarchy -
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this contains a helper + a amdgpu fb
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the helper contains a pointer to amdgpu framebuffer baseclass.
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@ -124,7 +126,7 @@ static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev,
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struct drm_gem_object *gobj = NULL;
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struct amdgpu_bo *abo = NULL;
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bool fb_tiled = false; /* useful for testing */
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u32 tiling_flags = 0;
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u32 tiling_flags = 0, domain;
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int ret;
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int aligned_size, size;
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int height = mode_cmd->height;
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@ -135,12 +137,12 @@ static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev,
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/* need to align pitch with crtc limits */
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mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp,
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fb_tiled);
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domain = amdgpu_display_framebuffer_domains(adev);
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height = ALIGN(mode_cmd->height, 8);
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size = mode_cmd->pitches[0] * height;
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aligned_size = ALIGN(size, PAGE_SIZE);
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ret = amdgpu_gem_object_create(adev, aligned_size, 0,
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AMDGPU_GEM_DOMAIN_VRAM,
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ret = amdgpu_gem_object_create(adev, aligned_size, 0, domain,
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AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
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AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |
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AMDGPU_GEM_CREATE_VRAM_CLEARED,
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@ -166,7 +168,7 @@ static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev,
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}
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ret = amdgpu_bo_pin(abo, AMDGPU_GEM_DOMAIN_VRAM, NULL);
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ret = amdgpu_bo_pin(abo, domain, NULL);
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if (ret) {
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amdgpu_bo_unreserve(abo);
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goto out_unref;
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@ -2984,11 +2984,13 @@ static int dm_plane_helper_prepare_fb(struct drm_plane *plane,
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{
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struct amdgpu_framebuffer *afb;
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struct drm_gem_object *obj;
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struct amdgpu_device *adev;
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struct amdgpu_bo *rbo;
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uint64_t chroma_addr = 0;
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int r;
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struct dm_plane_state *dm_plane_state_new, *dm_plane_state_old;
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unsigned int awidth;
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uint32_t domain;
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int r;
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dm_plane_state_old = to_dm_plane_state(plane->state);
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dm_plane_state_new = to_dm_plane_state(new_state);
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@ -3002,12 +3004,17 @@ static int dm_plane_helper_prepare_fb(struct drm_plane *plane,
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obj = afb->obj;
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rbo = gem_to_amdgpu_bo(obj);
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adev = amdgpu_ttm_adev(rbo->tbo.bdev);
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r = amdgpu_bo_reserve(rbo, false);
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if (unlikely(r != 0))
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return r;
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r = amdgpu_bo_pin(rbo, AMDGPU_GEM_DOMAIN_VRAM, &afb->address);
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if (plane->type != DRM_PLANE_TYPE_CURSOR)
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domain = amdgpu_display_framebuffer_domains(adev);
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else
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domain = AMDGPU_GEM_DOMAIN_VRAM;
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r = amdgpu_bo_pin(rbo, domain, &afb->address);
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amdgpu_bo_unreserve(rbo);
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