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Merge branch 'CR_9847_hibernation_6.6_hal.feng' into 'jh7110-6.6.y-devel'

Browse source 
CR_9847_hibernation_6.6_hal.feng

See merge request sdk/linux!1044
This commit is contained in:
andy.hu 2024-04-26 09:28:34 +00:00
commit 5e79ad6fb8
8 changed files with 74 additions and 11 deletions
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12
arch/riscv/mm/init.c
View file

@ -667,16 +667,16 @@ void __init create_pgd_mapping(pgd_t *pgdp,
static uintptr_t __init best_map_size(phys_addr_t pa, uintptr_t va,
phys_addr_t size)
{
if (!(pa & (PGDIR_SIZE - 1)) && !(va & (PGDIR_SIZE - 1)) && size >= PGDIR_SIZE)
return PGDIR_SIZE;
if (!(pa & (P4D_SIZE - 1)) && !(va & (P4D_SIZE - 1)) && size >= P4D_SIZE)
if (pgtable_l5_enabled &&
!(pa & (P4D_SIZE - 1)) && !(va & (P4D_SIZE - 1)) && size >= P4D_SIZE)
return P4D_SIZE;
if (!(pa & (PUD_SIZE - 1)) && !(va & (PUD_SIZE - 1)) && size >= PUD_SIZE)
if (pgtable_l4_enabled &&
!(pa & (PUD_SIZE - 1)) && !(va & (PUD_SIZE - 1)) && size >= PUD_SIZE)
return PUD_SIZE;
if (!(pa & (PMD_SIZE - 1)) && !(va & (PMD_SIZE - 1)) && size >= PMD_SIZE)
if (IS_ENABLED(CONFIG_64BIT) &&
!(pa & (PMD_SIZE - 1)) && !(va & (PMD_SIZE - 1)) && size >= PMD_SIZE)
return PMD_SIZE;
return PAGE_SIZE;

3
drivers/clk/starfive/clk-starfive-jh7110-aon.c
View file

@ -121,6 +121,7 @@ static int jh7110_aoncrg_probe(struct platform_device *pdev)
clk->hw.init = &init;
clk->idx = idx;
clk->max_div = max & JH71X0_CLK_DIV_MASK;
clk->reg_flags = JH7110_CLK_AON_FLAG;
ret = devm_clk_hw_register(&pdev->dev, &clk->hw);
if (ret)
@ -131,7 +132,7 @@ static int jh7110_aoncrg_probe(struct platform_device *pdev)
if (ret)
return ret;
return jh7110_reset_controller_register(priv, "rst-aon", 1);
return jh7110_reset_controller_register(priv, "rst-aon", JH7110_CLK_AON_FLAG);
}
static const struct of_device_id jh7110_aoncrg_match[] = {

20
drivers/clk/starfive/clk-starfive-jh7110-isp.c
View file

@ -86,6 +86,18 @@ static struct clk_hw *jh7110_ispclk_get(struct of_phandle_args *clkspec, void *d
return ERR_PTR(-EINVAL);
}
#ifdef CONFIG_PM_SLEEP
static int jh7110_ispcrg_sleep_suspend(struct device *dev)
{
return pm_runtime_force_suspend(dev);
}
static int jh7110_ispcrg_sleep_resume(struct device *dev)
{
return pm_runtime_force_resume(dev);
}
#endif
#ifdef CONFIG_PM
static int jh7110_ispcrg_suspend(struct device *dev)
{
@ -105,6 +117,7 @@ static int jh7110_ispcrg_resume(struct device *dev)
static const struct dev_pm_ops jh7110_ispcrg_pm_ops = {
RUNTIME_PM_OPS(jh7110_ispcrg_suspend, jh7110_ispcrg_resume, NULL)
LATE_SYSTEM_SLEEP_PM_OPS(jh7110_ispcrg_sleep_suspend, jh7110_ispcrg_sleep_resume)
};
#endif
@ -138,6 +151,8 @@ static int jh7110_ispcrg_probe(struct platform_device *pdev)
return dev_err_probe(priv->dev, ret, "failed to get main clocks\n");
dev_set_drvdata(priv->dev, top);
pm_runtime_use_autosuspend(priv->dev);
pm_runtime_set_autosuspend_delay(priv->dev, 50);
/* enable power domain and clocks */
pm_runtime_enable(priv->dev);
ret = pm_runtime_get_sync(priv->dev);
@ -180,6 +195,7 @@ static int jh7110_ispcrg_probe(struct platform_device *pdev)
clk->hw.init = &init;
clk->idx = idx;
clk->max_div = max & JH71X0_CLK_DIV_MASK;
clk->reg_flags = JH7110_CLK_ISP_FLAG;
ret = devm_clk_hw_register(&pdev->dev, &clk->hw);
if (ret)
@ -190,10 +206,12 @@ static int jh7110_ispcrg_probe(struct platform_device *pdev)
if (ret)
goto err_exit;
ret = jh7110_reset_controller_register(priv, "rst-isp", 3);
ret = jh7110_reset_controller_register(priv, "rst-isp", JH7110_CLK_ISP_FLAG);
if (ret)
goto err_exit;
pm_runtime_put_sync(&pdev->dev);
return 0;
err_exit:

3
drivers/clk/starfive/clk-starfive-jh7110-stg.c
View file

@ -139,6 +139,7 @@ static int jh7110_stgcrg_probe(struct platform_device *pdev)
clk->hw.init = &init;
clk->idx = idx;
clk->max_div = max & JH71X0_CLK_DIV_MASK;
clk->reg_flags = JH7110_CLK_STG_FLAG;
ret = devm_clk_hw_register(&pdev->dev, &clk->hw);
if (ret)
@ -149,7 +150,7 @@ static int jh7110_stgcrg_probe(struct platform_device *pdev)
if (ret)
return ret;
return jh7110_reset_controller_register(priv, "rst-stg", 2);
return jh7110_reset_controller_register(priv, "rst-stg", JH7110_CLK_STG_FLAG);
}
static const struct of_device_id jh7110_stgcrg_match[] = {

3
drivers/clk/starfive/clk-starfive-jh7110-sys.c
View file

@ -506,6 +506,7 @@ static int __init jh7110_syscrg_probe(struct platform_device *pdev)
clk->hw.init = &init;
clk->idx = idx;
clk->max_div = max & JH71X0_CLK_DIV_MASK;
clk->reg_flags = JH7110_CLK_SYS_FLAG;
ret = devm_clk_hw_register(&pdev->dev, &clk->hw);
if (ret)
@ -516,7 +517,7 @@ static int __init jh7110_syscrg_probe(struct platform_device *pdev)
if (ret)
return ret;
ret = jh7110_reset_controller_register(priv, "rst-sys", 0);
ret = jh7110_reset_controller_register(priv, "rst-sys", JH7110_CLK_SYS_FLAG);
if (ret)
return ret;

20
drivers/clk/starfive/clk-starfive-jh7110-vout.c
View file

@ -91,6 +91,18 @@ static struct clk_hw *jh7110_voutclk_get(struct of_phandle_args *clkspec, void *
return ERR_PTR(-EINVAL);
}
#ifdef CONFIG_PM_SLEEP
static int jh7110_voutcrg_sleep_suspend(struct device *dev)
{
return pm_runtime_force_suspend(dev);
}
static int jh7110_voutcrg_sleep_resume(struct device *dev)
{
return pm_runtime_force_resume(dev);
}
#endif
#ifdef CONFIG_PM
static int jh7110_voutcrg_suspend(struct device *dev)
{
@ -110,6 +122,7 @@ static int jh7110_voutcrg_resume(struct device *dev)
static const struct dev_pm_ops jh7110_voutcrg_pm_ops = {
RUNTIME_PM_OPS(jh7110_voutcrg_suspend, jh7110_voutcrg_resume, NULL)
LATE_SYSTEM_SLEEP_PM_OPS(jh7110_voutcrg_sleep_suspend, jh7110_voutcrg_sleep_resume)
};
#endif
@ -143,6 +156,8 @@ static int jh7110_voutcrg_probe(struct platform_device *pdev)
return dev_err_probe(priv->dev, ret, "failed to get top clocks\n");
dev_set_drvdata(priv->dev, top);
pm_runtime_use_autosuspend(priv->dev);
pm_runtime_set_autosuspend_delay(priv->dev, 50);
/* enable power domain and clocks */
pm_runtime_enable(priv->dev);
ret = pm_runtime_get_sync(priv->dev);
@ -187,6 +202,7 @@ static int jh7110_voutcrg_probe(struct platform_device *pdev)
clk->hw.init = &init;
clk->idx = idx;
clk->max_div = max & JH71X0_CLK_DIV_MASK;
clk->reg_flags = JH7110_CLK_VOUT_FLAG;
ret = devm_clk_hw_register(&pdev->dev, &clk->hw);
if (ret)
@ -197,10 +213,12 @@ static int jh7110_voutcrg_probe(struct platform_device *pdev)
if (ret)
goto err_exit;
ret = jh7110_reset_controller_register(priv, "rst-vo", 4);
ret = jh7110_reset_controller_register(priv, "rst-vo", JH7110_CLK_VOUT_FLAG);
if (ret)
goto err_exit;
pm_runtime_put_sync(&pdev->dev);
return 0;
err_exit:

15
drivers/clk/starfive/clk-starfive-jh71x0.c
View file

@ -245,6 +245,9 @@ static int jh7110_clk_save_context(struct clk_hw *hw)
if (!clk || !priv)
return 0;
if (clk->reg_flags == JH7110_CLK_ISP_FLAG || clk->reg_flags == JH7110_CLK_VOUT_FLAG)
return 0;
spin_lock(&priv->rmw_lock);
clk->saved_reg = jh71x0_clk_reg_get(clk);
spin_unlock(&priv->rmw_lock);
@ -259,6 +262,9 @@ static void jh7110_clk_gate_restore_context(struct clk_hw *hw)
if (!clk)
return;
if (clk->reg_flags == JH7110_CLK_ISP_FLAG || clk->reg_flags == JH7110_CLK_VOUT_FLAG)
return;
jh71x0_clk_reg_rmw(clk, JH71X0_CLK_ENABLE, clk->saved_reg);
}
@ -269,6 +275,9 @@ static void jh7110_clk_div_restore_context(struct clk_hw *hw)
if (!clk)
return;
if (clk->reg_flags == JH7110_CLK_ISP_FLAG || clk->reg_flags == JH7110_CLK_VOUT_FLAG)
return;
jh71x0_clk_reg_rmw(clk, JH71X0_CLK_DIV_MASK, clk->saved_reg);
}
@ -279,6 +288,9 @@ static void jh7110_clk_mux_restore_context(struct clk_hw *hw)
if (!clk)
return;
if (clk->reg_flags == JH7110_CLK_ISP_FLAG || clk->reg_flags == JH7110_CLK_VOUT_FLAG)
return;
jh71x0_clk_reg_rmw(clk, JH71X0_CLK_MUX_MASK, clk->saved_reg);
}
@ -289,6 +301,9 @@ static void jh7110_clk_inv_restore_context(struct clk_hw *hw)
if (!clk)
return;
if (clk->reg_flags == JH7110_CLK_ISP_FLAG || clk->reg_flags == JH7110_CLK_VOUT_FLAG)
return;
jh71x0_clk_reg_rmw(clk, JH71X0_CLK_INVERT, clk->saved_reg);
}

9
drivers/clk/starfive/clk-starfive-jh71x0.h
View file

@ -7,6 +7,14 @@
#include <linux/device.h>
#include <linux/spinlock.h>
enum JH7110_CLOCK_FLAGS {
JH7110_CLK_SYS_FLAG = 0,
JH7110_CLK_AON_FLAG,
JH7110_CLK_STG_FLAG,
JH7110_CLK_ISP_FLAG,
JH7110_CLK_VOUT_FLAG,
};
/* register fields */
#define JH71X0_CLK_ENABLE BIT(31)
#define JH71X0_CLK_INVERT BIT(30)
@ -107,6 +115,7 @@ struct jh71x0_clk {
struct clk_hw hw;
unsigned int idx;
unsigned int max_div;
unsigned int reg_flags;
u32 saved_reg;
};