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clk: st: Support for QUADFS inside ClockGenB/C/D/E/F

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The patch supports the 216/432/660 type Quad Frequency Synthesizers
used by ClockGenB/C/D/E/F

QUADFS clock : It includes support for all 216/432/660 type Quad
Frequency Synthesizers : implemented as Fixed Parent / Rate / Gate clock,
with clock rate calculated reading H/w settings done at BOOT.

QuadFS have 4 outputs : chan0 chan1 chan2 chan3

Signed-off-by: Pankaj Dev <pankaj.dev@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
This commit is contained in:
Gabriel FERNANDEZ 2014-02-27 16:24:17 +01:00 • committed by Mike Turquette
parent 44993d3840
commit 5f7aa9071e
2 changed files with 1040 additions and 1 deletions
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2
drivers/clk/st/Makefile
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@ -1 +1 @@
obj-y += clkgen-mux.o clkgen-pll.o obj-y += clkgen-mux.o clkgen-pll.o clkgen-fsyn.o

1039
drivers/clk/st/clkgen-fsyn.c Normal file
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