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drm/radeon/tn: disable PG when changing UVD clocks

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Causes hangs for some people.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2013-07-03 15:01:45 -04:00
parent 2b90eddcd7
commit 62fa44bf7b
1 changed files with 8 additions and 0 deletions
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8
drivers/gpu/drm/radeon/trinity_dpm.c
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@ -921,6 +921,10 @@ static void trinity_setup_uvd_clocks(struct radeon_device *rdev,
{
struct trinity_power_info *pi = trinity_get_pi(rdev);
if (pi->enable_gfx_power_gating) {
trinity_gfx_powergating_enable(rdev, false);
}
if (pi->uvd_dpm) {
if (trinity_uvd_clocks_zero(new_rps) &&
!trinity_uvd_clocks_zero(old_rps)) {
@ -946,6 +950,10 @@ static void trinity_setup_uvd_clocks(struct radeon_device *rdev,
radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk);
}
if (pi->enable_gfx_power_gating) {
trinity_gfx_powergating_enable(rdev, true);
}
}
static void trinity_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev,