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ARM: dts: Fix TPM schema violations
[ Upstream commit 8412c47d68436b9f9a260039a4a773daa6824925 ]
Since commit 26c9d152ebf3 ("dt-bindings: tpm: Consolidate TCG TIS
bindings"), several issues are reported by "make dtbs_check" for ARM
devicetrees:
The nodename needs to be "tpm@0" rather than "tpmdev@0" and the
compatible property needs to contain the chip's name in addition to the
generic "tcg,tpm_tis-spi" or "tcg,tpm-tis-i2c":
tpmdev@0: $nodename:0: 'tpmdev@0' does not match '^tpm(@[0-9a-f]+)?$'
from schema $id: http://devicetree.org/schemas/tpm/tcg,tpm_tis-spi.yaml#
tpm@2e: compatible: 'oneOf' conditional failed, one must be fixed:
['tcg,tpm-tis-i2c'] is too short
from schema $id: http://devicetree.org/schemas/tpm/tcg,tpm-tis-i2c.yaml#
Fix these schema violations.
Aspeed Facebook BMCs use an Infineon SLB9670:
https://lore.kernel.org/all/ZZSmMJ%2F%2Fl972Qbxu@fedora/
https://lore.kernel.org/all/ZZT4%2Fw2eVzMhtsPx@fedora/
https://lore.kernel.org/all/ZZTS0p1hdAchIbKp@heinlein.vulture-banana.ts.net/
Aspeed Tacoma uses a Nuvoton NPCT75X per commit 39d8a73c53
("ARM: dts:
aspeed: tacoma: Add TPM").
phyGATE-Tauri uses an Infineon SLB9670:
https://lore.kernel.org/all/ab45c82485fa272f74adf560cbb58ee60cc42689.camel@phytec.de/
A single schema violation remains in am335x-moxa-uc-2100-common.dtsi
because it is unknown which chip is used on the board. The devicetree's
author has been asked for clarification but has not responded so far:
https://lore.kernel.org/all/20231220090910.GA32182@wunner.de/
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Reviewed-by: Tao Ren <rentao.bupt@gmail.com>
Reviewed-by: Bruno Thomsen <bruno.thomsen@gmail.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
parent
b0dd4d7ada
commit
64783eaa37
7 changed files with 10 additions and 10 deletions
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@ -45,8 +45,8 @@
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num-chipselects = <1>;
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cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
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tpmdev@0 {
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compatible = "tcg,tpm_tis-spi";
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tpm@0 {
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compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
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spi-max-frequency = <33000000>;
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reg = <0>;
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};
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@ -80,8 +80,8 @@
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gpio-miso = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_HIGH>;
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num-chipselects = <1>;
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tpmdev@0 {
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compatible = "tcg,tpm_tis-spi";
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tpm@0 {
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compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
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spi-max-frequency = <33000000>;
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reg = <0>;
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};
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@ -456,7 +456,7 @@
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status = "okay";
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tpm: tpm@2e {
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compatible = "tcg,tpm-tis-i2c";
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compatible = "nuvoton,npct75x", "tcg,tpm-tis-i2c";
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reg = <0x2e>;
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};
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};
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@ -35,8 +35,8 @@
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gpio-mosi = <&gpio0 ASPEED_GPIO(X, 4) GPIO_ACTIVE_HIGH>;
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gpio-miso = <&gpio0 ASPEED_GPIO(X, 5) GPIO_ACTIVE_HIGH>;
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tpmdev@0 {
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compatible = "tcg,tpm_tis-spi";
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tpm@0 {
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compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
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spi-max-frequency = <33000000>;
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reg = <0>;
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};
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@ -121,7 +121,7 @@
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tpm_tis: tpm@1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_tpm>;
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compatible = "tcg,tpm_tis-spi";
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compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
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reg = <1>;
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spi-max-frequency = <20000000>;
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interrupt-parent = <&gpio5>;
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@ -130,7 +130,7 @@
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* TCG specification - Section 6.4.1 Clocking:
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* TPM shall support a SPI clock frequency range of 10-24 MHz.
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*/
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st33htph: tpm-tis@0 {
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st33htph: tpm@0 {
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compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi";
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reg = <0>;
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spi-max-frequency = <24000000>;
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@ -217,7 +217,7 @@
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pinctrl-names = "default";
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pinctrl-0 = <&spi1_pins>;
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tpm_spi_tis@0 {
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tpm@0 {
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compatible = "tcg,tpm_tis-spi";
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reg = <0>;
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spi-max-frequency = <500000>;
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