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dt-bindings:SEC: Remove bindings for SEC_DMA

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Removing dt-bindings for Starfive JH7110 SEC_DMA as
the hardware engine will use original ARM PL08X
driver.

Signed-off-by: jiajie.ho <jiajie.ho@starfivetech.com>
This commit is contained in:
jiajie.ho 2022-10-14 09:57:06 +08:00
parent 323a02034d
commit 64fea0aff5
2 changed files with 0 additions and 80 deletions
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75
Documentation/devicetree/bindings/dma/starfive-pl080.yaml
View file

@ -1,75 +0,0 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/crypto/starfive-sec.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Starfive SEC controller Device Tree Bindings
properties:
compatible:
const: starfive,jh7110-pl080
reg:
minItem: 1
reg-names:
maxItem: 1
const: sec_dma
interrupts:
minItem: 1
clocks:
minItem: 1
items:
-description:sec_hclk clock
-description:sec_ahb clock
clock-names:
minItem: 1
items:
-const:sec_hclk
-const:sec_ahb
resets:
minItem: 1
items:
-description:sec_hre reset
reset-names:
minItem: 1
items:
-const:sec_hre
required:
- compatible
- reg
- reg-names
- interrupts
- clocks
- clock-names
- resets
- reset-names
additionalProperties:false
examples:
- |
sec_dma: sec_dma@16008000 {
compatible = "starfive,pl080", "arm,pl080";
reg = <0x0 0x16008000 0x0 0x4000>;
reg-names = "sec_dma";
interrupts = <29>;
clocks = <&clkgen JH7110_SEC_HCLK>,
<&clkgen JH7110_SEC_MISCAHB_CLK>;
clock-names = "sec_hclk","sec_ahb";
resets = <&rstgen RSTN_U0_SEC_TOP_HRESETN>;
reset-names = "sec_hre";
lli-bus-interface-ahb1;
mem-bus-interface-ahb1;
memcpy-burst-size = <256>;
memcpy-bus-width = <32>;
#dma-cells = <2>;
status = "disabled";
};

5
MAINTAINERS
View file

@ -20856,8 +20856,3 @@ STARFIVE JH7110 SDIO
M: William Qiu <william.qiu@starfivetech.com>
S: Maintained
F: Documentation/devicetree/bindings/mmc/starfive,jh7110-sdio.yaml
STARFIVE JH7110 SEC-DMA
M: William Qiu <william.qiu@starfivetech.com>
S: Maintained
F: Documentation/devicetree/bindings/dma/starfive-pl080.yaml