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msm: timer: compensate for timer shift in msm_read_timer_count

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Some msm targets have timers whose lower bits are unreliable. So, we
present our timers as lower frequency than they actually are, and ignore
the bottom 5 bits on such targets. This compensation was erroneously
removed from the msm_read_timer_count function, so restore it.

This was broken by 94790ec25 "msm: timer: SMP timer support for msm".

Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
This commit is contained in:
Jeff Ohlstein 2011-06-17 13:55:38 -07:00 • committed by David Brown
parent ebf30dc91c
commit 650f156775
1 changed files with 5 additions and 1 deletions
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6
arch/arm/mach-msm/timer.c
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@ -102,7 +102,11 @@ static cycle_t msm_read_timer_count(struct clocksource *cs)
{ {
struct msm_clock *clk = container_of(cs, struct msm_clock, clocksource); struct msm_clock *clk = container_of(cs, struct msm_clock, clocksource);
return readl(clk->global_counter); /*
* Shift timer count down by a constant due to unreliable lower bits
* on some targets.
*/
return readl(clk->global_counter) >> clk->shift;
} }
static struct msm_clock *clockevent_to_clock(struct clock_event_device *evt) static struct msm_clock *clockevent_to_clock(struct clock_event_device *evt)