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MIPS: Add HARDWARE_WATCHPOINTS definitions and support code.

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This is the main support code for the patch.  Here we just add the
code, the following patches hook it up.

Signed-off-by: David Daney <ddaney@avtrex.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 create mode 100644 arch/mips/include/asm/watch.h
 create mode 100644 arch/mips/kernel/watch.c
This commit is contained in:
David Daney 2008-09-23 00:05:54 -07:00 • committed by Ralf Baechle
parent 8192c9ea9a
commit 6aa3524c18
6 changed files with 249 additions and 1 deletions
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20
arch/mips/include/asm/processor.h
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@ -105,6 +105,19 @@ struct mips_dsp_state {
{0,} \
}
struct mips3264_watch_reg_state {
/* The width of watchlo is 32 in a 32 bit kernel and 64 in a
64 bit kernel. We use unsigned long as it has the same
property. */
unsigned long watchlo[NUM_WATCH_REGS];
/* Only the mask and IRW bits from watchhi. */
u16 watchhi[NUM_WATCH_REGS];
};
union mips_watch_reg_state {
struct mips3264_watch_reg_state mips3264;
};
typedef struct {
unsigned long seg;
} mm_segment_t;
@ -137,6 +150,9 @@ struct thread_struct {
/* Saved state of the DSP ASE, if available. */
struct mips_dsp_state dsp;
/* Saved watch register state, if available. */
union mips_watch_reg_state watch;
/* Other stuff associated with the thread. */
unsigned long cp0_badvaddr; /* Last user fault */
unsigned long cp0_baduaddr; /* Last kernel fault accessing USEG */
@ -192,6 +208,10 @@ struct thread_struct {
.dspr = {0, }, \
.dspcontrol = 0, \
}, \
/* \
* saved watch register stuff \
*/ \
.watch = {{{0,},},}, \
/* \
* Other stuff associated with the process \
*/ \