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X86/Hyper-V: Enlighten APIC access
Hyper-V supports MSR based APIC access; implement the enlightenment. Signed-off-by: K. Y. Srinivasan <kys@microsoft.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Michael Kelley <mikelley@microsoft.com> Cc: olaf@aepfle.de Cc: sthemmin@microsoft.com Cc: gregkh@linuxfoundation.org Cc: jasowang@redhat.com Cc: Michael.H.Kelley@microsoft.com Cc: hpa@zytor.com Cc: apw@canonical.com Cc: devel@linuxdriverproject.org Cc: vkuznets@redhat.com Link: https://lkml.kernel.org/r/20180516215334.6547-1-kys@linuxonhyperv.com
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4 changed files with 112 additions and 3 deletions
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@ -1 +1 @@
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obj-y := hv_init.o mmu.o
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obj-y := hv_init.o mmu.o hv_apic.o
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104
arch/x86/hyperv/hv_apic.c
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104
arch/x86/hyperv/hv_apic.c
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Hyper-V specific APIC code.
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*
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* Copyright (C) 2018, Microsoft, Inc.
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*
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* Author : K. Y. Srinivasan <kys@microsoft.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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*/
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#include <linux/types.h>
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#include <linux/version.h>
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#include <linux/vmalloc.h>
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#include <linux/mm.h>
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#include <linux/clockchips.h>
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#include <linux/hyperv.h>
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#include <linux/slab.h>
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#include <linux/cpuhotplug.h>
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#include <asm/hypervisor.h>
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#include <asm/mshyperv.h>
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#ifdef CONFIG_X86_64
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#if IS_ENABLED(CONFIG_HYPERV)
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static u64 hv_apic_icr_read(void)
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{
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u64 reg_val;
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rdmsrl(HV_X64_MSR_ICR, reg_val);
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return reg_val;
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}
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static void hv_apic_icr_write(u32 low, u32 id)
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{
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u64 reg_val;
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reg_val = SET_APIC_DEST_FIELD(id);
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reg_val = reg_val << 32;
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reg_val |= low;
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wrmsrl(HV_X64_MSR_ICR, reg_val);
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}
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static u32 hv_apic_read(u32 reg)
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{
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u32 reg_val, hi;
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switch (reg) {
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case APIC_EOI:
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rdmsr(HV_X64_MSR_EOI, reg_val, hi);
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return reg_val;
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case APIC_TASKPRI:
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rdmsr(HV_X64_MSR_TPR, reg_val, hi);
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return reg_val;
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default:
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return native_apic_mem_read(reg);
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}
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}
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static void hv_apic_write(u32 reg, u32 val)
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{
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switch (reg) {
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case APIC_EOI:
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wrmsr(HV_X64_MSR_EOI, val, 0);
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break;
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case APIC_TASKPRI:
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wrmsr(HV_X64_MSR_TPR, val, 0);
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break;
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default:
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native_apic_mem_write(reg, val);
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}
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}
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static void hv_apic_eoi_write(u32 reg, u32 val)
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{
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wrmsr(HV_X64_MSR_EOI, val, 0);
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}
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void __init hv_apic_init(void)
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{
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if (ms_hyperv.hints & HV_X64_APIC_ACCESS_RECOMMENDED) {
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pr_info("Hyper-V: Using MSR based APIC access\n");
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apic_set_eoi_write(hv_apic_eoi_write);
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apic->read = hv_apic_read;
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apic->write = hv_apic_write;
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apic->icr_write = hv_apic_icr_write;
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apic->icr_read = hv_apic_icr_read;
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}
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}
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#endif /* CONFIG_HYPERV */
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#endif /* CONFIG_X86_64 */
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@ -242,8 +242,9 @@ static int hv_cpu_die(unsigned int cpu)
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*
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*
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* 1. Setup the hypercall page.
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* 1. Setup the hypercall page.
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* 2. Register Hyper-V specific clocksource.
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* 2. Register Hyper-V specific clocksource.
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* 3. Setup Hyper-V specific APIC entry points.
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*/
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*/
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void hyperv_init(void)
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void __init hyperv_init(void)
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{
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{
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u64 guest_id, required_msrs;
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u64 guest_id, required_msrs;
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union hv_x64_msr_hypercall_contents hypercall_msr;
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union hv_x64_msr_hypercall_contents hypercall_msr;
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@ -298,6 +299,8 @@ void hyperv_init(void)
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hyper_alloc_mmu();
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hyper_alloc_mmu();
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hv_apic_init();
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/*
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/*
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* Register Hyper-V specific clocksource.
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* Register Hyper-V specific clocksource.
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*/
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*/
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@ -258,7 +258,7 @@ static inline int hv_cpu_number_to_vp_number(int cpu_number)
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return hv_vp_index[cpu_number];
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return hv_vp_index[cpu_number];
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}
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}
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void hyperv_init(void);
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void __init hyperv_init(void);
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void hyperv_setup_mmu_ops(void);
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void hyperv_setup_mmu_ops(void);
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void hyper_alloc_mmu(void);
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void hyper_alloc_mmu(void);
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void hyperv_report_panic(struct pt_regs *regs, long err);
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void hyperv_report_panic(struct pt_regs *regs, long err);
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@ -269,6 +269,7 @@ void hyperv_reenlightenment_intr(struct pt_regs *regs);
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void set_hv_tscchange_cb(void (*cb)(void));
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void set_hv_tscchange_cb(void (*cb)(void));
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void clear_hv_tscchange_cb(void);
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void clear_hv_tscchange_cb(void);
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void hyperv_stop_tsc_emulation(void);
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void hyperv_stop_tsc_emulation(void);
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void hv_apic_init(void);
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#else /* CONFIG_HYPERV */
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#else /* CONFIG_HYPERV */
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static inline void hyperv_init(void) {}
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static inline void hyperv_init(void) {}
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static inline bool hv_is_hyperv_initialized(void) { return false; }
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static inline bool hv_is_hyperv_initialized(void) { return false; }
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@ -277,6 +278,7 @@ static inline void hyperv_setup_mmu_ops(void) {}
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static inline void set_hv_tscchange_cb(void (*cb)(void)) {}
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static inline void set_hv_tscchange_cb(void (*cb)(void)) {}
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static inline void clear_hv_tscchange_cb(void) {}
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static inline void clear_hv_tscchange_cb(void) {}
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static inline void hyperv_stop_tsc_emulation(void) {};
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static inline void hyperv_stop_tsc_emulation(void) {};
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static inline void hv_apic_init(void) {}
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static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
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static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
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{
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{
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return NULL;
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return NULL;
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