GitHub-Mirror/Star64_linux
2
0
Fork 0
mirror of https://github.com/Fishwaldo/Star64_linux.git synced 2025-07-23 07:12:09 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

x86: provide 64-bit with a load_sp0 function.

Browse source 
Paravirt guests need to inform the underlying hypervisor whenever the sp0
tss field changes. i386 already has such a function, and we use it for
x86_64 too. There's an unnecessary (for 64-bit) msr handling part in the original
version, and it is placed around an ifdef. Making no more sense in
processor_32.h, it is moved to the common header

Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
Glauber de Oliveira Costa 2008-01-30 13:31:31 +01:00 • committed by Ingo Molnar
parent ca241c7503
commit 7818a1e029
4 changed files with 23 additions and 23 deletions
Download patch file Download diff file Expand all files Collapse all files

22
include/asm-x86/processor.h
View file

@ -193,8 +193,22 @@ static inline void native_set_iopl_mask(unsigned mask)
#endif
}
static inline void native_load_sp0(struct tss_struct *tss,
struct thread_struct *thread)
{
tss->x86_tss.sp0 = thread->sp0;
#ifdef CONFIG_X86_32
/* Only happens when SEP is enabled, no need to test "SEP"arately */
if (unlikely(tss->x86_tss.ss1 != thread->sysenter_cs)) {
tss->x86_tss.ss1 = thread->sysenter_cs;
wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0);
}
#endif
}
#ifndef CONFIG_PARAVIRT
#ifdef CONFIG_PARAVIRT
#include <asm/paravirt.h>
#else
#define __cpuid native_cpuid
#define paravirt_enabled() 0
@ -206,6 +220,12 @@ static inline void native_set_iopl_mask(unsigned mask)
#define set_debugreg(value, register) \
native_set_debugreg(register, value)
static inline void load_sp0(struct tss_struct *tss,
struct thread_struct *thread)
{
native_load_sp0(tss, thread);
}
#define set_iopl_mask native_set_iopl_mask
#endif /* CONFIG_PARAVIRT */