Merge branch 'CR_2026_compatible_5.15_ziv.xu' into 'jh7110-5.15.y-devel'

CR_2026_compatible_standard_515

See merge request sdk/linux!459
This commit is contained in:
andy.hu 2022-09-07 03:43:01 +00:00
commit 7cc40a96f3
11 changed files with 103 additions and 102 deletions

View file

@ -8,8 +8,8 @@
#include "jh7110-common.dtsi"
&i2c5 {
pmic: stf7110_evb_reg@50 {
compatible = "stf,jh7110-evb-regulator";
pmic: jh7110_evb_reg@50 {
compatible = "starfive,jh7110-evb-regulator";
reg = <0x50>;
regulators {

View file

@ -222,7 +222,7 @@
idle-states {
CPU_RET_0_0: cpu-retentive-0-0 {
compatible = "riscv,idle-state";
compatible = "starfive,jh7110-idle-state";
riscv,sbi-suspend-param = <0x10000000>;
entry-latency-us = <20>;
exit-latency-us = <40>;
@ -230,7 +230,7 @@
};
CPU_NONRET_0_0: cpu-nonretentive-0-0 {
compatible = "riscv,idle-state";
compatible = "starfive,jh7110-idle-state";
riscv,sbi-suspend-param = <0x90000000>;
entry-latency-us = <250>;
exit-latency-us = <500>;
@ -238,7 +238,7 @@
};
CLUSTER_RET_0: cluster-retentive-0 {
compatible = "riscv,idle-state";
compatible = "starfive,jh7110-idle-state";
riscv,sbi-suspend-param = <0x11000000>;
local-timer-stop;
entry-latency-us = <50>;
@ -248,7 +248,7 @@
};
CLUSTER_NONRET_0: cluster-nonretentive-0 {
compatible = "riscv,idle-state";
compatible = "starfive,jh7110-idle-state";
riscv,sbi-suspend-param = <0x91000000>;
local-timer-stop;
entry-latency-us = <600>;
@ -1493,7 +1493,7 @@
};
pcie0: pcie@2B000000 {
compatible = "plda,pci-xpressrich3-axi";
compatible = "starfive,jh7110-pcie","plda,pci-xpressrich3-axi";
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
@ -1531,7 +1531,7 @@
};
pcie1: pcie@2C000000 {
compatible = "plda,pci-xpressrich3-axi";
compatible = "starfive,jh7110-pcie","plda,pci-xpressrich3-axi";
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
@ -1791,8 +1791,8 @@
};
};
stf_cpufreq: starfive,stf-cpufreq {
compatible = "starfive,stf-cpufreq";
starfive_cpufreq: starfive,jh7110-cpufreq {
compatible = "starfive,jh7110-cpufreq";
clocks = <&clkgen JH7110_PLL0_OUT>,
<&clkgen JH7110_CPU_ROOT>,
<&osc>;

View file

@ -177,7 +177,7 @@ CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_SYSFS=y
CONFIG_STARFIVE_WATCHDOG=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_STF7110=y
CONFIG_REGULATOR_STARFIVE_JH7110=y
# CONFIG_MEDIA_CEC_SUPPORT is not set
CONFIG_MEDIA_SUPPORT=y
CONFIG_MEDIA_USB_SUPPORT=y

View file

@ -16,7 +16,7 @@
#define VOLT_TOL (10000)
struct stf_cpu_dvfs_info {
struct starfive_cpu_dvfs_info {
struct regulator *vddcpu;
struct clk *cpu_clk;
struct clk *pll0_clk;
@ -26,11 +26,11 @@ struct stf_cpu_dvfs_info {
struct cpumask cpus;
};
static int stf_cpufreq_set_target_index(struct cpufreq_policy *policy,
static int starfive_cpufreq_set_target_index(struct cpufreq_policy *policy,
unsigned int index)
{
struct cpufreq_frequency_table *freq_table = policy->freq_table;
struct stf_cpu_dvfs_info *info = cpufreq_get_driver_data();
struct starfive_cpu_dvfs_info *info = cpufreq_get_driver_data();
struct dev_pm_opp *opp;
unsigned long old_freq, new_freq;
int old_vdd, target_vdd, ret;
@ -92,9 +92,9 @@ static int stf_cpufreq_set_target_index(struct cpufreq_policy *policy,
return 0;
}
static int stf_cpufreq_driver_init(struct cpufreq_policy *policy)
static int starfive_cpufreq_driver_init(struct cpufreq_policy *policy)
{
struct stf_cpu_dvfs_info *info = cpufreq_get_driver_data();
struct starfive_cpu_dvfs_info *info = cpufreq_get_driver_data();
struct cpufreq_frequency_table *freq_table;
int ret;
@ -113,8 +113,8 @@ static int stf_cpufreq_driver_init(struct cpufreq_policy *policy)
return 0;
}
static int stf_cpu_dvfs_info_init(struct platform_device *pdev,
struct stf_cpu_dvfs_info *info)
static int starfive_cpu_dvfs_info_init(struct platform_device *pdev,
struct starfive_cpu_dvfs_info *info)
{
struct device *dev = &pdev->dev;
int ret;
@ -173,58 +173,58 @@ static int stf_cpu_dvfs_info_init(struct platform_device *pdev,
return 0;
}
static struct cpufreq_driver stf_cpufreq_driver = {
static struct cpufreq_driver starfive_cpufreq_driver = {
.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
.verify = cpufreq_generic_frequency_table_verify,
.target_index = stf_cpufreq_set_target_index,
.target_index = starfive_cpufreq_set_target_index,
.get = cpufreq_generic_get,
.init = stf_cpufreq_driver_init,
.name = "stf-cpufreq",
.init = starfive_cpufreq_driver_init,
.name = "starfive-cpufreq",
.attr = cpufreq_generic_attr,
};
static int stf_cpufreq_probe(struct platform_device *pdev)
static int starfive_cpufreq_probe(struct platform_device *pdev)
{
struct stf_cpu_dvfs_info *info;
struct starfive_cpu_dvfs_info *info;
int ret;
info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
if (!info)
return -ENOMEM;
ret = stf_cpu_dvfs_info_init(pdev, info);
ret = starfive_cpu_dvfs_info_init(pdev, info);
if (ret) {
dev_err(&pdev->dev, "Failed to init stf cpu dvfs info\n");
dev_err(&pdev->dev, "Failed to init starfive cpu dvfs info\n");
return ret;
}
stf_cpufreq_driver.driver_data = info;
ret = cpufreq_register_driver(&stf_cpufreq_driver);
starfive_cpufreq_driver.driver_data = info;
ret = cpufreq_register_driver(&starfive_cpufreq_driver);
if (ret)
dev_err(&pdev->dev, "Failed to register stf cpufreq driver\n");
dev_err(&pdev->dev, "Failed to register starfive cpufreq driver\n");
return ret;
}
static const struct of_device_id stf_cpufreq_match_table[] = {
{ .compatible = "starfive,stf-cpufreq" },
static const struct of_device_id starfive_cpufreq_match_table[] = {
{ .compatible = "starfive,jh7110-cpufreq" },
{}
};
static struct platform_driver stf_cpufreq_plat_driver = {
.probe = stf_cpufreq_probe,
static struct platform_driver starfive_cpufreq_plat_driver = {
.probe = starfive_cpufreq_probe,
.driver = {
.name = "stf-cpufreq",
.of_match_table = stf_cpufreq_match_table,
.name = "starfive-cpufreq",
.of_match_table = starfive_cpufreq_match_table,
},
};
static int __init stf_cpufreq_init(void)
static int __init starfive_cpufreq_init(void)
{
return platform_driver_register(&stf_cpufreq_plat_driver);
return platform_driver_register(&starfive_cpufreq_plat_driver);
}
postcore_initcall(stf_cpufreq_init);
postcore_initcall(starfive_cpufreq_init);
MODULE_DESCRIPTION("STARFIVE CPUFREQ Driver");
MODULE_AUTHOR("Mason Huuo <mason.huo@starfivetech.com>");

View file

@ -195,7 +195,7 @@ static void sbi_idle_init_cpuhp(void)
}
static const struct of_device_id sbi_cpuidle_state_match[] = {
{ .compatible = "riscv,idle-state",
{ .compatible = "starfive,jh7110-idle-state",
.data = sbi_cpuidle_enter_state },
{ },
};

View file

@ -923,6 +923,7 @@ static int plda_pcie_remove(struct platform_device *pdev)
static const struct of_device_id plda_pcie_of_match[] = {
{ .compatible = "plda,pci-xpressrich3-axi"},
{ .compatible = "starfive,jh7110-pcie"},
{ },
};
MODULE_DEVICE_TABLE(of, plda_pcie_of_match);

View file

@ -1137,7 +1137,7 @@ config REGULATOR_SLG51000
The SLG51000 is seven compact and customizable low dropout
regulators.
config REGULATOR_STF7110
config REGULATOR_STARFIVE_JH7110
tristate "Starfive JH7110 PMIC"
depends on I2C
select REGMAP_I2C

View file

@ -136,7 +136,7 @@ obj-$(CONFIG_REGULATOR_S5M8767) += s5m8767.o
obj-$(CONFIG_REGULATOR_SC2731) += sc2731-regulator.o
obj-$(CONFIG_REGULATOR_SKY81452) += sky81452-regulator.o
obj-$(CONFIG_REGULATOR_SLG51000) += slg51000-regulator.o
obj-$(CONFIG_REGULATOR_STF7110) += stf7110-regulator.o
obj-$(CONFIG_REGULATOR_STARFIVE_JH7110) += starfive-jh7110-regulator.o
obj-$(CONFIG_REGULATOR_STM32_BOOSTER) += stm32-booster.o
obj-$(CONFIG_REGULATOR_STM32_VREFBUF) += stm32-vrefbuf.o
obj-$(CONFIG_REGULATOR_STM32_PWR) += stm32-pwr.o

View file

@ -14,51 +14,51 @@
#include <linux/regulator/driver.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/of_regulator.h>
#include <linux/regulator/stf7110.h>
#include <linux/regulator/jh7110.h>
#include <linux/slab.h>
#define STF7110_PM_POWER_SW_0 0x80
#define STF7110_PM_POWER_SW_1 0x81
#define JH7110_PM_POWER_SW_0 0x80
#define JH7110_PM_POWER_SW_1 0x81
#define ENABLE_MASK(id) BIT(id)
static const struct regmap_config stf7110_regmap_config = {
static const struct regmap_config jh7110_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = STF7110_PM_POWER_SW_1,
.max_register = JH7110_PM_POWER_SW_1,
.cache_type = REGCACHE_FLAT,
};
static const struct regulator_ops stf7110_ldo_ops = {
static const struct regulator_ops jh7110_ldo_ops = {
.enable = regulator_enable_regmap,
.disable = regulator_disable_regmap,
.is_enabled = regulator_is_enabled_regmap,
};
#define STF7110_LDO(_id, _name, en_reg, en_mask) \
#define JH7110_LDO(_id, _name, en_reg, en_mask) \
{\
.name = (_name),\
.ops = &stf7110_ldo_ops,\
.ops = &jh7110_ldo_ops,\
.of_match = of_match_ptr(_name),\
.regulators_node = of_match_ptr("regulators"),\
.type = REGULATOR_VOLTAGE,\
.id = STF7110_ID_##_id,\
.id = JH7110_ID_##_id,\
.owner = THIS_MODULE,\
.enable_reg = STF7110_PM_POWER_SW_##en_reg,\
.enable_reg = JH7110_PM_POWER_SW_##en_reg,\
.enable_mask = ENABLE_MASK(en_mask),\
}
static const struct regulator_desc stf7110_regulators[] = {
STF7110_LDO(LDO_REG1, "hdmi_1p8", 0, 0),
STF7110_LDO(LDO_REG2, "mipitx_1p8", 0, 1),
STF7110_LDO(LDO_REG3, "mipirx_1p8", 0, 2),
STF7110_LDO(LDO_REG4, "hdmi_0p9", 0, 3),
STF7110_LDO(LDO_REG5, "mipitx_0p9", 0, 4),
STF7110_LDO(LDO_REG6, "mipirx_0p9", 0, 5),
STF7110_LDO(LDO_REG7, "sdio_vdd", 1, 0),
static const struct regulator_desc jh7110_regulators[] = {
JH7110_LDO(LDO_REG1, "hdmi_1p8", 0, 0),
JH7110_LDO(LDO_REG2, "mipitx_1p8", 0, 1),
JH7110_LDO(LDO_REG3, "mipirx_1p8", 0, 2),
JH7110_LDO(LDO_REG4, "hdmi_0p9", 0, 3),
JH7110_LDO(LDO_REG5, "mipitx_0p9", 0, 4),
JH7110_LDO(LDO_REG6, "mipirx_0p9", 0, 5),
JH7110_LDO(LDO_REG7, "sdio_vdd", 1, 0),
};
static int stf7110_i2c_probe(struct i2c_client *i2c)
static int jh7110_i2c_probe(struct i2c_client *i2c)
{
struct regulator_config config = { };
struct regulator_dev *rdev;
@ -66,7 +66,7 @@ static int stf7110_i2c_probe(struct i2c_client *i2c)
struct regmap *regmap;
int i, ret;
regmap = devm_regmap_init_i2c(i2c, &stf7110_regmap_config);
regmap = devm_regmap_init_i2c(i2c, &jh7110_regmap_config);
if (IS_ERR(regmap)) {
ret = PTR_ERR(regmap);
dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
@ -79,15 +79,15 @@ static int stf7110_i2c_probe(struct i2c_client *i2c)
return -ENOMEM;
config.init_data = init_data;
for (i = 0; i < STF7110_MAX_REGULATORS; i++) {
for (i = 0; i < JH7110_MAX_REGULATORS; i++) {
config.dev = &i2c->dev;
config.regmap = regmap;
rdev = devm_regulator_register(&i2c->dev,
&stf7110_regulators[i], &config);
&jh7110_regulators[i], &config);
if (IS_ERR(rdev)) {
dev_err(&i2c->dev,
"Failed to register STF7110 regulator\n");
"Failed to register JH7110 regulator\n");
return PTR_ERR(rdev);
}
}
@ -95,32 +95,32 @@ static int stf7110_i2c_probe(struct i2c_client *i2c)
return 0;
}
static const struct i2c_device_id stf7110_i2c_id[] = {
{"stf7110_evb_reg", 0},
static const struct i2c_device_id jh7110_i2c_id[] = {
{"jh7110_evb_reg", 0},
{},
};
MODULE_DEVICE_TABLE(i2c, stf7110_i2c_id);
MODULE_DEVICE_TABLE(i2c, jh7110_i2c_id);
#ifdef CONFIG_OF
static const struct of_device_id stf7110_dt_ids[] = {
{ .compatible = "stf,jh7110-evb-regulator",
.data = &stf7110_i2c_id[0] },
static const struct of_device_id jh7110_dt_ids[] = {
{ .compatible = "starfive,jh7110-evb-regulator",
.data = &jh7110_i2c_id[0] },
{},
};
MODULE_DEVICE_TABLE(of, stf7110_dt_ids);
MODULE_DEVICE_TABLE(of, jh7110_dt_ids);
#endif
static struct i2c_driver stf7110_regulator_driver = {
static struct i2c_driver jh7110_regulator_driver = {
.driver = {
.name = "stf7110-evb-regulator",
.of_match_table = of_match_ptr(stf7110_dt_ids),
.name = "jh7110-evb-regulator",
.of_match_table = of_match_ptr(jh7110_dt_ids),
},
.probe_new = stf7110_i2c_probe,
.id_table = stf7110_i2c_id,
.probe_new = jh7110_i2c_probe,
.id_table = jh7110_i2c_id,
};
module_i2c_driver(stf7110_regulator_driver);
module_i2c_driver(jh7110_regulator_driver);
MODULE_AUTHOR("Mason Huo <mason.huo@starfivetech.com>");
MODULE_DESCRIPTION("Regulator device driver for Starfive STF7110");
MODULE_DESCRIPTION("Regulator device driver for Starfive JH7110");
MODULE_LICENSE("GPL v2");

View file

@ -0,0 +1,24 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2022 Starfive Technology Co., Ltd.
* Author: Mason Huo <mason.huo@starfivetech.com>
*/
#ifndef __LINUX_REGULATOR_JH7110_H
#define __LINUX_REGULATOR_JH7110_H
#define JH7110_MAX_REGULATORS 7
enum jh7110_reg_id {
JH7110_ID_LDO_REG1 = 0,
JH7110_ID_LDO_REG2,
JH7110_ID_LDO_REG3,
JH7110_ID_LDO_REG4,
JH7110_ID_LDO_REG5,
JH7110_ID_LDO_REG6,
JH7110_ID_LDO_REG7,
};
#endif /* __LINUX_REGULATOR_JH7110_H */

View file

@ -1,24 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2022 Starfive Technology Co., Ltd.
* Author: Mason Huo <mason.huo@starfivetech.com>
*/
#ifndef __LINUX_REGULATOR_STF7110_H
#define __LINUX_REGULATOR_STF7110_H
#define STF7110_MAX_REGULATORS 7
enum stf7110_reg_id {
STF7110_ID_LDO_REG1 = 0,
STF7110_ID_LDO_REG2,
STF7110_ID_LDO_REG3,
STF7110_ID_LDO_REG4,
STF7110_ID_LDO_REG5,
STF7110_ID_LDO_REG6,
STF7110_ID_LDO_REG7,
};
#endif /* __LINUX_REGULATOR_STF7110_H */