mirror of
https://github.com/Fishwaldo/Star64_linux.git
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Merge branch 'pfc' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/sh-pinmux
From Simon Horman. Based on agreement between me, Paul Mundt, Linus Walleij and Simon, we're mergning this large branch of pinctrl conversion through arm-soc, even though it contains the corresponding conversions for arch/sh. Main reason for this is tight dependencies (that will now mostly be broken) between the arch/sh and mach-shmobile implementations. There will be more of this in 3.10 to do device-tree bindings, but this is the initial conversion. * 'pfc' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (80 commits) sh-pfc: Move sh_pfc.h from include/linux/ to driver directory sh-pfc: Remove pinmux_info definition sh: Remove unused sh_pfc_register_info() function sh: shx3: pinmux: Use driver-provided pinmux info sh: sh7786: pinmux: Use driver-provided pinmux info sh: sh7785: pinmux: Use driver-provided pinmux info sh: sh7757: pinmux: Use driver-provided pinmux info sh: sh7734: pinmux: Use driver-provided pinmux info sh: sh7724: pinmux: Use driver-provided pinmux info sh: sh7723: pinmux: Use driver-provided pinmux info sh: sh7722: pinmux: Use driver-provided pinmux info sh: sh7720: pinmux: Use driver-provided pinmux info sh: sh7269: pinmux: Use driver-provided pinmux info sh: sh7264: pinmux: Use driver-provided pinmux info sh: sh7203: pinmux: Use driver-provided pinmux info ARM: shmobile: sh73a0: Use driver-provided pinmux info ARM: shmobile: sh7372: Use driver-provided pinmux info ARM: shmobile: r8a7779: Use driver-provided pinmux info ARM: shmobile: r8a7740: Use driver-provided pinmux info sh-pfc: Add shx3 pinmux support ... Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
7e5fc77931
54 changed files with 21900 additions and 21523 deletions
|
|
@ -1,6 +1,5 @@
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|||
menu "SuperH / SH-Mobile Driver Options"
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source "drivers/sh/intc/Kconfig"
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source "drivers/sh/pfc/Kconfig"
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endmenu
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|
|
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|||
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@ -5,7 +5,6 @@ obj-y := intc/
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|||
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obj-$(CONFIG_HAVE_CLK) += clk/
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obj-$(CONFIG_MAPLE) += maple/
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obj-$(CONFIG_SH_PFC) += pfc/
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obj-$(CONFIG_SUPERHYWAY) += superhyway/
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obj-y += pm_runtime.o
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|
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|||
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@ -1,26 +0,0 @@
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comment "Pin function controller options"
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config SH_PFC
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# XXX move off the gpio dependency
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depends on GENERIC_GPIO
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select GPIO_SH_PFC if ARCH_REQUIRE_GPIOLIB
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select PINCTRL_SH_PFC
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def_bool y
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#
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# Placeholder for now, rehome to drivers/pinctrl once the PFC APIs
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# have settled.
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#
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config PINCTRL_SH_PFC
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tristate "SuperH PFC pin controller driver"
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depends on SH_PFC
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select PINCTRL
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select PINMUX
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select PINCONF
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config GPIO_SH_PFC
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tristate "SuperH PFC GPIO support"
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depends on SH_PFC && GPIOLIB
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help
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This enables support for GPIOs within the SoC's pin function
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controller.
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@ -1,3 +0,0 @@
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obj-y += core.o
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obj-$(CONFIG_PINCTRL_SH_PFC) += pinctrl.o
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obj-$(CONFIG_GPIO_SH_PFC) += gpio.o
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@ -1,572 +0,0 @@
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/*
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* SuperH Pin Function Controller support.
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*
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* Copyright (C) 2008 Magnus Damm
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* Copyright (C) 2009 - 2012 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#define pr_fmt(fmt) "sh_pfc " KBUILD_MODNAME ": " fmt
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/sh_pfc.h>
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#include <linux/module.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/bitops.h>
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#include <linux/slab.h>
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#include <linux/ioport.h>
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#include <linux/pinctrl/machine.h>
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static struct sh_pfc *sh_pfc __read_mostly;
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static inline bool sh_pfc_initialized(void)
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{
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return !!sh_pfc;
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}
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static void pfc_iounmap(struct sh_pfc *pfc)
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{
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int k;
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for (k = 0; k < pfc->num_resources; k++)
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if (pfc->window[k].virt)
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iounmap(pfc->window[k].virt);
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kfree(pfc->window);
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pfc->window = NULL;
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}
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static int pfc_ioremap(struct sh_pfc *pfc)
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{
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struct resource *res;
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int k;
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if (!pfc->num_resources)
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return 0;
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pfc->window = kzalloc(pfc->num_resources * sizeof(*pfc->window),
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GFP_NOWAIT);
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if (!pfc->window)
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goto err1;
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for (k = 0; k < pfc->num_resources; k++) {
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res = pfc->resource + k;
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WARN_ON(resource_type(res) != IORESOURCE_MEM);
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pfc->window[k].phys = res->start;
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pfc->window[k].size = resource_size(res);
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pfc->window[k].virt = ioremap_nocache(res->start,
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resource_size(res));
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if (!pfc->window[k].virt)
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goto err2;
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}
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return 0;
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err2:
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pfc_iounmap(pfc);
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err1:
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return -1;
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}
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static void __iomem *pfc_phys_to_virt(struct sh_pfc *pfc,
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unsigned long address)
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{
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struct pfc_window *window;
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int k;
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/* scan through physical windows and convert address */
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for (k = 0; k < pfc->num_resources; k++) {
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window = pfc->window + k;
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if (address < window->phys)
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continue;
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if (address >= (window->phys + window->size))
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continue;
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return window->virt + (address - window->phys);
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}
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/* no windows defined, register must be 1:1 mapped virt:phys */
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return (void __iomem *)address;
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}
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static int enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
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{
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if (enum_id < r->begin)
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return 0;
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if (enum_id > r->end)
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return 0;
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return 1;
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}
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static unsigned long gpio_read_raw_reg(void __iomem *mapped_reg,
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unsigned long reg_width)
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{
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switch (reg_width) {
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case 8:
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return ioread8(mapped_reg);
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case 16:
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return ioread16(mapped_reg);
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case 32:
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return ioread32(mapped_reg);
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}
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BUG();
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return 0;
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}
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static void gpio_write_raw_reg(void __iomem *mapped_reg,
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unsigned long reg_width,
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unsigned long data)
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{
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switch (reg_width) {
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case 8:
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iowrite8(data, mapped_reg);
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return;
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case 16:
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iowrite16(data, mapped_reg);
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return;
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case 32:
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iowrite32(data, mapped_reg);
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return;
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}
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BUG();
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}
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int sh_pfc_read_bit(struct pinmux_data_reg *dr, unsigned long in_pos)
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{
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unsigned long pos;
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pos = dr->reg_width - (in_pos + 1);
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pr_debug("read_bit: addr = %lx, pos = %ld, "
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"r_width = %ld\n", dr->reg, pos, dr->reg_width);
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return (gpio_read_raw_reg(dr->mapped_reg, dr->reg_width) >> pos) & 1;
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}
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EXPORT_SYMBOL_GPL(sh_pfc_read_bit);
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void sh_pfc_write_bit(struct pinmux_data_reg *dr, unsigned long in_pos,
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unsigned long value)
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{
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unsigned long pos;
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pos = dr->reg_width - (in_pos + 1);
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pr_debug("write_bit addr = %lx, value = %d, pos = %ld, "
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"r_width = %ld\n",
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dr->reg, !!value, pos, dr->reg_width);
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if (value)
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set_bit(pos, &dr->reg_shadow);
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else
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clear_bit(pos, &dr->reg_shadow);
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gpio_write_raw_reg(dr->mapped_reg, dr->reg_width, dr->reg_shadow);
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}
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EXPORT_SYMBOL_GPL(sh_pfc_write_bit);
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static void config_reg_helper(struct sh_pfc *pfc,
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struct pinmux_cfg_reg *crp,
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unsigned long in_pos,
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void __iomem **mapped_regp,
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unsigned long *maskp,
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unsigned long *posp)
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{
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int k;
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*mapped_regp = pfc_phys_to_virt(pfc, crp->reg);
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if (crp->field_width) {
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*maskp = (1 << crp->field_width) - 1;
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*posp = crp->reg_width - ((in_pos + 1) * crp->field_width);
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} else {
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*maskp = (1 << crp->var_field_width[in_pos]) - 1;
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*posp = crp->reg_width;
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for (k = 0; k <= in_pos; k++)
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*posp -= crp->var_field_width[k];
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}
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}
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static int read_config_reg(struct sh_pfc *pfc,
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struct pinmux_cfg_reg *crp,
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unsigned long field)
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{
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void __iomem *mapped_reg;
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unsigned long mask, pos;
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config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);
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pr_debug("read_reg: addr = %lx, field = %ld, "
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"r_width = %ld, f_width = %ld\n",
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crp->reg, field, crp->reg_width, crp->field_width);
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return (gpio_read_raw_reg(mapped_reg, crp->reg_width) >> pos) & mask;
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}
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static void write_config_reg(struct sh_pfc *pfc,
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struct pinmux_cfg_reg *crp,
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unsigned long field, unsigned long value)
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{
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void __iomem *mapped_reg;
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unsigned long mask, pos, data;
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config_reg_helper(pfc, crp, field, &mapped_reg, &mask, &pos);
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pr_debug("write_reg addr = %lx, value = %ld, field = %ld, "
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"r_width = %ld, f_width = %ld\n",
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crp->reg, value, field, crp->reg_width, crp->field_width);
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mask = ~(mask << pos);
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value = value << pos;
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data = gpio_read_raw_reg(mapped_reg, crp->reg_width);
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data &= mask;
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data |= value;
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if (pfc->unlock_reg)
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gpio_write_raw_reg(pfc_phys_to_virt(pfc, pfc->unlock_reg),
|
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32, ~data);
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|
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gpio_write_raw_reg(mapped_reg, crp->reg_width, data);
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}
|
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|
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static int setup_data_reg(struct sh_pfc *pfc, unsigned gpio)
|
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{
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struct pinmux_gpio *gpiop = &pfc->gpios[gpio];
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struct pinmux_data_reg *data_reg;
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int k, n;
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|
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if (!enum_in_range(gpiop->enum_id, &pfc->data))
|
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return -1;
|
||||
|
||||
k = 0;
|
||||
while (1) {
|
||||
data_reg = pfc->data_regs + k;
|
||||
|
||||
if (!data_reg->reg_width)
|
||||
break;
|
||||
|
||||
data_reg->mapped_reg = pfc_phys_to_virt(pfc, data_reg->reg);
|
||||
|
||||
for (n = 0; n < data_reg->reg_width; n++) {
|
||||
if (data_reg->enum_ids[n] == gpiop->enum_id) {
|
||||
gpiop->flags &= ~PINMUX_FLAG_DREG;
|
||||
gpiop->flags |= (k << PINMUX_FLAG_DREG_SHIFT);
|
||||
gpiop->flags &= ~PINMUX_FLAG_DBIT;
|
||||
gpiop->flags |= (n << PINMUX_FLAG_DBIT_SHIFT);
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
k++;
|
||||
}
|
||||
|
||||
BUG();
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
static void setup_data_regs(struct sh_pfc *pfc)
|
||||
{
|
||||
struct pinmux_data_reg *drp;
|
||||
int k;
|
||||
|
||||
for (k = pfc->first_gpio; k <= pfc->last_gpio; k++)
|
||||
setup_data_reg(pfc, k);
|
||||
|
||||
k = 0;
|
||||
while (1) {
|
||||
drp = pfc->data_regs + k;
|
||||
|
||||
if (!drp->reg_width)
|
||||
break;
|
||||
|
||||
drp->reg_shadow = gpio_read_raw_reg(drp->mapped_reg,
|
||||
drp->reg_width);
|
||||
k++;
|
||||
}
|
||||
}
|
||||
|
||||
int sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio,
|
||||
struct pinmux_data_reg **drp, int *bitp)
|
||||
{
|
||||
struct pinmux_gpio *gpiop = &pfc->gpios[gpio];
|
||||
int k, n;
|
||||
|
||||
if (!enum_in_range(gpiop->enum_id, &pfc->data))
|
||||
return -1;
|
||||
|
||||
k = (gpiop->flags & PINMUX_FLAG_DREG) >> PINMUX_FLAG_DREG_SHIFT;
|
||||
n = (gpiop->flags & PINMUX_FLAG_DBIT) >> PINMUX_FLAG_DBIT_SHIFT;
|
||||
*drp = pfc->data_regs + k;
|
||||
*bitp = n;
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(sh_pfc_get_data_reg);
|
||||
|
||||
static int get_config_reg(struct sh_pfc *pfc, pinmux_enum_t enum_id,
|
||||
struct pinmux_cfg_reg **crp,
|
||||
int *fieldp, int *valuep,
|
||||
unsigned long **cntp)
|
||||
{
|
||||
struct pinmux_cfg_reg *config_reg;
|
||||
unsigned long r_width, f_width, curr_width, ncomb;
|
||||
int k, m, n, pos, bit_pos;
|
||||
|
||||
k = 0;
|
||||
while (1) {
|
||||
config_reg = pfc->cfg_regs + k;
|
||||
|
||||
r_width = config_reg->reg_width;
|
||||
f_width = config_reg->field_width;
|
||||
|
||||
if (!r_width)
|
||||
break;
|
||||
|
||||
pos = 0;
|
||||
m = 0;
|
||||
for (bit_pos = 0; bit_pos < r_width; bit_pos += curr_width) {
|
||||
if (f_width)
|
||||
curr_width = f_width;
|
||||
else
|
||||
curr_width = config_reg->var_field_width[m];
|
||||
|
||||
ncomb = 1 << curr_width;
|
||||
for (n = 0; n < ncomb; n++) {
|
||||
if (config_reg->enum_ids[pos + n] == enum_id) {
|
||||
*crp = config_reg;
|
||||
*fieldp = m;
|
||||
*valuep = n;
|
||||
*cntp = &config_reg->cnt[m];
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
pos += ncomb;
|
||||
m++;
|
||||
}
|
||||
k++;
|
||||
}
|
||||
|
||||
return -1;
|
||||
}
|
||||
|
||||
int sh_pfc_gpio_to_enum(struct sh_pfc *pfc, unsigned gpio, int pos,
|
||||
pinmux_enum_t *enum_idp)
|
||||
{
|
||||
pinmux_enum_t enum_id = pfc->gpios[gpio].enum_id;
|
||||
pinmux_enum_t *data = pfc->gpio_data;
|
||||
int k;
|
||||
|
||||
if (!enum_in_range(enum_id, &pfc->data)) {
|
||||
if (!enum_in_range(enum_id, &pfc->mark)) {
|
||||
pr_err("non data/mark enum_id for gpio %d\n", gpio);
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
if (pos) {
|
||||
*enum_idp = data[pos + 1];
|
||||
return pos + 1;
|
||||
}
|
||||
|
||||
for (k = 0; k < pfc->gpio_data_size; k++) {
|
||||
if (data[k] == enum_id) {
|
||||
*enum_idp = data[k + 1];
|
||||
return k + 1;
|
||||
}
|
||||
}
|
||||
|
||||
pr_err("cannot locate data/mark enum_id for gpio %d\n", gpio);
|
||||
return -1;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(sh_pfc_gpio_to_enum);
|
||||
|
||||
int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
|
||||
int cfg_mode)
|
||||
{
|
||||
struct pinmux_cfg_reg *cr = NULL;
|
||||
pinmux_enum_t enum_id;
|
||||
struct pinmux_range *range;
|
||||
int in_range, pos, field, value;
|
||||
unsigned long *cntp;
|
||||
|
||||
switch (pinmux_type) {
|
||||
|
||||
case PINMUX_TYPE_FUNCTION:
|
||||
range = NULL;
|
||||
break;
|
||||
|
||||
case PINMUX_TYPE_OUTPUT:
|
||||
range = &pfc->output;
|
||||
break;
|
||||
|
||||
case PINMUX_TYPE_INPUT:
|
||||
range = &pfc->input;
|
||||
break;
|
||||
|
||||
case PINMUX_TYPE_INPUT_PULLUP:
|
||||
range = &pfc->input_pu;
|
||||
break;
|
||||
|
||||
case PINMUX_TYPE_INPUT_PULLDOWN:
|
||||
range = &pfc->input_pd;
|
||||
break;
|
||||
|
||||
default:
|
||||
goto out_err;
|
||||
}
|
||||
|
||||
pos = 0;
|
||||
enum_id = 0;
|
||||
field = 0;
|
||||
value = 0;
|
||||
while (1) {
|
||||
pos = sh_pfc_gpio_to_enum(pfc, gpio, pos, &enum_id);
|
||||
if (pos <= 0)
|
||||
goto out_err;
|
||||
|
||||
if (!enum_id)
|
||||
break;
|
||||
|
||||
/* first check if this is a function enum */
|
||||
in_range = enum_in_range(enum_id, &pfc->function);
|
||||
if (!in_range) {
|
||||
/* not a function enum */
|
||||
if (range) {
|
||||
/*
|
||||
* other range exists, so this pin is
|
||||
* a regular GPIO pin that now is being
|
||||
* bound to a specific direction.
|
||||
*
|
||||
* for this case we only allow function enums
|
||||
* and the enums that match the other range.
|
||||
*/
|
||||
in_range = enum_in_range(enum_id, range);
|
||||
|
||||
/*
|
||||
* special case pass through for fixed
|
||||
* input-only or output-only pins without
|
||||
* function enum register association.
|
||||
*/
|
||||
if (in_range && enum_id == range->force)
|
||||
continue;
|
||||
} else {
|
||||
/*
|
||||
* no other range exists, so this pin
|
||||
* must then be of the function type.
|
||||
*
|
||||
* allow function type pins to select
|
||||
* any combination of function/in/out
|
||||
* in their MARK lists.
|
||||
*/
|
||||
in_range = 1;
|
||||
}
|
||||
}
|
||||
|
||||
if (!in_range)
|
||||
continue;
|
||||
|
||||
if (get_config_reg(pfc, enum_id, &cr,
|
||||
&field, &value, &cntp) != 0)
|
||||
goto out_err;
|
||||
|
||||
switch (cfg_mode) {
|
||||
case GPIO_CFG_DRYRUN:
|
||||
if (!*cntp ||
|
||||
(read_config_reg(pfc, cr, field) != value))
|
||||
continue;
|
||||
break;
|
||||
|
||||
case GPIO_CFG_REQ:
|
||||
write_config_reg(pfc, cr, field, value);
|
||||
*cntp = *cntp + 1;
|
||||
break;
|
||||
|
||||
case GPIO_CFG_FREE:
|
||||
*cntp = *cntp - 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
out_err:
|
||||
return -1;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(sh_pfc_config_gpio);
|
||||
|
||||
int register_sh_pfc(struct sh_pfc *pfc)
|
||||
{
|
||||
int (*initroutine)(struct sh_pfc *) = NULL;
|
||||
int ret;
|
||||
|
||||
/*
|
||||
* Ensure that the type encoding fits
|
||||
*/
|
||||
BUILD_BUG_ON(PINMUX_FLAG_TYPE > ((1 << PINMUX_FLAG_DBIT_SHIFT) - 1));
|
||||
|
||||
if (sh_pfc)
|
||||
return -EBUSY;
|
||||
|
||||
ret = pfc_ioremap(pfc);
|
||||
if (unlikely(ret < 0))
|
||||
return ret;
|
||||
|
||||
spin_lock_init(&pfc->lock);
|
||||
|
||||
pinctrl_provide_dummies();
|
||||
setup_data_regs(pfc);
|
||||
|
||||
sh_pfc = pfc;
|
||||
|
||||
/*
|
||||
* Initialize pinctrl bindings first
|
||||
*/
|
||||
initroutine = symbol_request(sh_pfc_register_pinctrl);
|
||||
if (initroutine) {
|
||||
ret = (*initroutine)(pfc);
|
||||
symbol_put_addr(initroutine);
|
||||
|
||||
if (unlikely(ret != 0))
|
||||
goto err;
|
||||
} else {
|
||||
pr_err("failed to initialize pinctrl bindings\n");
|
||||
goto err;
|
||||
}
|
||||
|
||||
/*
|
||||
* Then the GPIO chip
|
||||
*/
|
||||
initroutine = symbol_request(sh_pfc_register_gpiochip);
|
||||
if (initroutine) {
|
||||
ret = (*initroutine)(pfc);
|
||||
symbol_put_addr(initroutine);
|
||||
|
||||
/*
|
||||
* If the GPIO chip fails to come up we still leave the
|
||||
* PFC state as it is, given that there are already
|
||||
* extant users of it that have succeeded by this point.
|
||||
*/
|
||||
if (unlikely(ret != 0)) {
|
||||
pr_notice("failed to init GPIO chip, ignoring...\n");
|
||||
ret = 0;
|
||||
}
|
||||
}
|
||||
|
||||
pr_info("%s support registered\n", pfc->name);
|
||||
|
||||
return 0;
|
||||
|
||||
err:
|
||||
pfc_iounmap(pfc);
|
||||
sh_pfc = NULL;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -1,240 +0,0 @@
|
|||
/*
|
||||
* SuperH Pin Function Controller GPIO driver.
|
||||
*
|
||||
* Copyright (C) 2008 Magnus Damm
|
||||
* Copyright (C) 2009 - 2012 Paul Mundt
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
#define pr_fmt(fmt) "sh_pfc " KBUILD_MODNAME ": " fmt
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/pinctrl/consumer.h>
|
||||
#include <linux/sh_pfc.h>
|
||||
|
||||
struct sh_pfc_chip {
|
||||
struct sh_pfc *pfc;
|
||||
struct gpio_chip gpio_chip;
|
||||
};
|
||||
|
||||
static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc)
|
||||
{
|
||||
return container_of(gc, struct sh_pfc_chip, gpio_chip);
|
||||
}
|
||||
|
||||
static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc)
|
||||
{
|
||||
return gpio_to_pfc_chip(gc)->pfc;
|
||||
}
|
||||
|
||||
static int sh_gpio_request(struct gpio_chip *gc, unsigned offset)
|
||||
{
|
||||
return pinctrl_request_gpio(offset);
|
||||
}
|
||||
|
||||
static void sh_gpio_free(struct gpio_chip *gc, unsigned offset)
|
||||
{
|
||||
pinctrl_free_gpio(offset);
|
||||
}
|
||||
|
||||
static void sh_gpio_set_value(struct sh_pfc *pfc, unsigned gpio, int value)
|
||||
{
|
||||
struct pinmux_data_reg *dr = NULL;
|
||||
int bit = 0;
|
||||
|
||||
if (!pfc || sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0)
|
||||
BUG();
|
||||
else
|
||||
sh_pfc_write_bit(dr, bit, value);
|
||||
}
|
||||
|
||||
static int sh_gpio_get_value(struct sh_pfc *pfc, unsigned gpio)
|
||||
{
|
||||
struct pinmux_data_reg *dr = NULL;
|
||||
int bit = 0;
|
||||
|
||||
if (!pfc || sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0)
|
||||
return -EINVAL;
|
||||
|
||||
return sh_pfc_read_bit(dr, bit);
|
||||
}
|
||||
|
||||
static int sh_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
|
||||
{
|
||||
return pinctrl_gpio_direction_input(offset);
|
||||
}
|
||||
|
||||
static int sh_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
|
||||
int value)
|
||||
{
|
||||
sh_gpio_set_value(gpio_to_pfc(gc), offset, value);
|
||||
|
||||
return pinctrl_gpio_direction_output(offset);
|
||||
}
|
||||
|
||||
static int sh_gpio_get(struct gpio_chip *gc, unsigned offset)
|
||||
{
|
||||
return sh_gpio_get_value(gpio_to_pfc(gc), offset);
|
||||
}
|
||||
|
||||
static void sh_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
|
||||
{
|
||||
sh_gpio_set_value(gpio_to_pfc(gc), offset, value);
|
||||
}
|
||||
|
||||
static int sh_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
|
||||
{
|
||||
struct sh_pfc *pfc = gpio_to_pfc(gc);
|
||||
pinmux_enum_t enum_id;
|
||||
pinmux_enum_t *enum_ids;
|
||||
int i, k, pos;
|
||||
|
||||
pos = 0;
|
||||
enum_id = 0;
|
||||
while (1) {
|
||||
pos = sh_pfc_gpio_to_enum(pfc, offset, pos, &enum_id);
|
||||
if (pos <= 0 || !enum_id)
|
||||
break;
|
||||
|
||||
for (i = 0; i < pfc->gpio_irq_size; i++) {
|
||||
enum_ids = pfc->gpio_irq[i].enum_ids;
|
||||
for (k = 0; enum_ids[k]; k++) {
|
||||
if (enum_ids[k] == enum_id)
|
||||
return pfc->gpio_irq[i].irq;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
static void sh_pfc_gpio_setup(struct sh_pfc_chip *chip)
|
||||
{
|
||||
struct sh_pfc *pfc = chip->pfc;
|
||||
struct gpio_chip *gc = &chip->gpio_chip;
|
||||
|
||||
gc->request = sh_gpio_request;
|
||||
gc->free = sh_gpio_free;
|
||||
gc->direction_input = sh_gpio_direction_input;
|
||||
gc->get = sh_gpio_get;
|
||||
gc->direction_output = sh_gpio_direction_output;
|
||||
gc->set = sh_gpio_set;
|
||||
gc->to_irq = sh_gpio_to_irq;
|
||||
|
||||
WARN_ON(pfc->first_gpio != 0); /* needs testing */
|
||||
|
||||
gc->label = pfc->name;
|
||||
gc->owner = THIS_MODULE;
|
||||
gc->base = pfc->first_gpio;
|
||||
gc->ngpio = (pfc->last_gpio - pfc->first_gpio) + 1;
|
||||
}
|
||||
|
||||
int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
|
||||
{
|
||||
struct sh_pfc_chip *chip;
|
||||
int ret;
|
||||
|
||||
chip = kzalloc(sizeof(struct sh_pfc_chip), GFP_KERNEL);
|
||||
if (unlikely(!chip))
|
||||
return -ENOMEM;
|
||||
|
||||
chip->pfc = pfc;
|
||||
|
||||
sh_pfc_gpio_setup(chip);
|
||||
|
||||
ret = gpiochip_add(&chip->gpio_chip);
|
||||
if (unlikely(ret < 0))
|
||||
kfree(chip);
|
||||
|
||||
pr_info("%s handling gpio %d -> %d\n",
|
||||
pfc->name, pfc->first_gpio, pfc->last_gpio);
|
||||
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(sh_pfc_register_gpiochip);
|
||||
|
||||
static int sh_pfc_gpio_match(struct gpio_chip *gc, void *data)
|
||||
{
|
||||
return !!strstr(gc->label, data);
|
||||
}
|
||||
|
||||
static int sh_pfc_gpio_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct sh_pfc_chip *chip;
|
||||
struct gpio_chip *gc;
|
||||
|
||||
gc = gpiochip_find("_pfc", sh_pfc_gpio_match);
|
||||
if (unlikely(!gc)) {
|
||||
pr_err("Cant find gpio chip\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
chip = gpio_to_pfc_chip(gc);
|
||||
platform_set_drvdata(pdev, chip);
|
||||
|
||||
pr_info("attaching to GPIO chip %s\n", chip->pfc->name);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sh_pfc_gpio_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct sh_pfc_chip *chip = platform_get_drvdata(pdev);
|
||||
int ret;
|
||||
|
||||
ret = gpiochip_remove(&chip->gpio_chip);
|
||||
if (unlikely(ret < 0))
|
||||
return ret;
|
||||
|
||||
kfree(chip);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver sh_pfc_gpio_driver = {
|
||||
.probe = sh_pfc_gpio_probe,
|
||||
.remove = sh_pfc_gpio_remove,
|
||||
.driver = {
|
||||
.name = KBUILD_MODNAME,
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device sh_pfc_gpio_device = {
|
||||
.name = KBUILD_MODNAME,
|
||||
.id = -1,
|
||||
};
|
||||
|
||||
static int __init sh_pfc_gpio_init(void)
|
||||
{
|
||||
int rc;
|
||||
|
||||
rc = platform_driver_register(&sh_pfc_gpio_driver);
|
||||
if (likely(!rc)) {
|
||||
rc = platform_device_register(&sh_pfc_gpio_device);
|
||||
if (unlikely(rc))
|
||||
platform_driver_unregister(&sh_pfc_gpio_driver);
|
||||
}
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
static void __exit sh_pfc_gpio_exit(void)
|
||||
{
|
||||
platform_device_unregister(&sh_pfc_gpio_device);
|
||||
platform_driver_unregister(&sh_pfc_gpio_driver);
|
||||
}
|
||||
|
||||
module_init(sh_pfc_gpio_init);
|
||||
module_exit(sh_pfc_gpio_exit);
|
||||
|
||||
MODULE_AUTHOR("Magnus Damm, Paul Mundt");
|
||||
MODULE_DESCRIPTION("GPIO driver for SuperH pin function controller");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_ALIAS("platform:pfc-gpio");
|
||||
|
|
@ -1,527 +0,0 @@
|
|||
/*
|
||||
* SuperH Pin Function Controller pinmux support.
|
||||
*
|
||||
* Copyright (C) 2012 Paul Mundt
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU General Public
|
||||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
#define DRV_NAME "pinctrl-sh_pfc"
|
||||
|
||||
#define pr_fmt(fmt) DRV_NAME " " KBUILD_MODNAME ": " fmt
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/sh_pfc.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/pinctrl/consumer.h>
|
||||
#include <linux/pinctrl/pinctrl.h>
|
||||
#include <linux/pinctrl/pinconf.h>
|
||||
#include <linux/pinctrl/pinmux.h>
|
||||
#include <linux/pinctrl/pinconf-generic.h>
|
||||
|
||||
struct sh_pfc_pinctrl {
|
||||
struct pinctrl_dev *pctl;
|
||||
struct sh_pfc *pfc;
|
||||
|
||||
struct pinmux_gpio **functions;
|
||||
unsigned int nr_functions;
|
||||
|
||||
struct pinctrl_pin_desc *pads;
|
||||
unsigned int nr_pads;
|
||||
|
||||
spinlock_t lock;
|
||||
};
|
||||
|
||||
static struct sh_pfc_pinctrl *sh_pfc_pmx;
|
||||
|
||||
static int sh_pfc_get_groups_count(struct pinctrl_dev *pctldev)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
|
||||
return pmx->nr_pads;
|
||||
}
|
||||
|
||||
static const char *sh_pfc_get_group_name(struct pinctrl_dev *pctldev,
|
||||
unsigned selector)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
|
||||
return pmx->pads[selector].name;
|
||||
}
|
||||
|
||||
static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned group,
|
||||
const unsigned **pins, unsigned *num_pins)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
|
||||
*pins = &pmx->pads[group].number;
|
||||
*num_pins = 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void sh_pfc_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
|
||||
unsigned offset)
|
||||
{
|
||||
seq_printf(s, "%s", DRV_NAME);
|
||||
}
|
||||
|
||||
static struct pinctrl_ops sh_pfc_pinctrl_ops = {
|
||||
.get_groups_count = sh_pfc_get_groups_count,
|
||||
.get_group_name = sh_pfc_get_group_name,
|
||||
.get_group_pins = sh_pfc_get_group_pins,
|
||||
.pin_dbg_show = sh_pfc_pin_dbg_show,
|
||||
};
|
||||
|
||||
static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
|
||||
return pmx->nr_functions;
|
||||
}
|
||||
|
||||
static const char *sh_pfc_get_function_name(struct pinctrl_dev *pctldev,
|
||||
unsigned selector)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
|
||||
return pmx->functions[selector]->name;
|
||||
}
|
||||
|
||||
static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev, unsigned func,
|
||||
const char * const **groups,
|
||||
unsigned * const num_groups)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
|
||||
*groups = &pmx->functions[func]->name;
|
||||
*num_groups = 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sh_pfc_noop_enable(struct pinctrl_dev *pctldev, unsigned func,
|
||||
unsigned group)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void sh_pfc_noop_disable(struct pinctrl_dev *pctldev, unsigned func,
|
||||
unsigned group)
|
||||
{
|
||||
}
|
||||
|
||||
static inline int sh_pfc_config_function(struct sh_pfc *pfc, unsigned offset)
|
||||
{
|
||||
if (sh_pfc_config_gpio(pfc, offset,
|
||||
PINMUX_TYPE_FUNCTION,
|
||||
GPIO_CFG_DRYRUN) != 0)
|
||||
return -EINVAL;
|
||||
|
||||
if (sh_pfc_config_gpio(pfc, offset,
|
||||
PINMUX_TYPE_FUNCTION,
|
||||
GPIO_CFG_REQ) != 0)
|
||||
return -EINVAL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
|
||||
int new_type)
|
||||
{
|
||||
unsigned long flags;
|
||||
int pinmux_type;
|
||||
int ret = -EINVAL;
|
||||
|
||||
spin_lock_irqsave(&pfc->lock, flags);
|
||||
|
||||
pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE;
|
||||
|
||||
/*
|
||||
* See if the present config needs to first be de-configured.
|
||||
*/
|
||||
switch (pinmux_type) {
|
||||
case PINMUX_TYPE_GPIO:
|
||||
break;
|
||||
case PINMUX_TYPE_OUTPUT:
|
||||
case PINMUX_TYPE_INPUT:
|
||||
case PINMUX_TYPE_INPUT_PULLUP:
|
||||
case PINMUX_TYPE_INPUT_PULLDOWN:
|
||||
sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
|
||||
break;
|
||||
default:
|
||||
goto err;
|
||||
}
|
||||
|
||||
/*
|
||||
* Dry run
|
||||
*/
|
||||
if (sh_pfc_config_gpio(pfc, offset, new_type,
|
||||
GPIO_CFG_DRYRUN) != 0)
|
||||
goto err;
|
||||
|
||||
/*
|
||||
* Request
|
||||
*/
|
||||
if (sh_pfc_config_gpio(pfc, offset, new_type,
|
||||
GPIO_CFG_REQ) != 0)
|
||||
goto err;
|
||||
|
||||
pfc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
|
||||
pfc->gpios[offset].flags |= new_type;
|
||||
|
||||
ret = 0;
|
||||
|
||||
err:
|
||||
spin_unlock_irqrestore(&pfc->lock, flags);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev,
|
||||
struct pinctrl_gpio_range *range,
|
||||
unsigned offset)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
struct sh_pfc *pfc = pmx->pfc;
|
||||
unsigned long flags;
|
||||
int ret, pinmux_type;
|
||||
|
||||
spin_lock_irqsave(&pfc->lock, flags);
|
||||
|
||||
pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE;
|
||||
|
||||
switch (pinmux_type) {
|
||||
case PINMUX_TYPE_FUNCTION:
|
||||
pr_notice_once("Use of GPIO API for function requests is "
|
||||
"deprecated, convert to pinctrl\n");
|
||||
/* handle for now */
|
||||
ret = sh_pfc_config_function(pfc, offset);
|
||||
if (unlikely(ret < 0))
|
||||
goto err;
|
||||
|
||||
break;
|
||||
case PINMUX_TYPE_GPIO:
|
||||
case PINMUX_TYPE_INPUT:
|
||||
case PINMUX_TYPE_OUTPUT:
|
||||
break;
|
||||
default:
|
||||
pr_err("Unsupported mux type (%d), bailing...\n", pinmux_type);
|
||||
ret = -ENOTSUPP;
|
||||
goto err;
|
||||
}
|
||||
|
||||
ret = 0;
|
||||
|
||||
err:
|
||||
spin_unlock_irqrestore(&pfc->lock, flags);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
|
||||
struct pinctrl_gpio_range *range,
|
||||
unsigned offset)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
struct sh_pfc *pfc = pmx->pfc;
|
||||
unsigned long flags;
|
||||
int pinmux_type;
|
||||
|
||||
spin_lock_irqsave(&pfc->lock, flags);
|
||||
|
||||
pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE;
|
||||
|
||||
sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
|
||||
|
||||
spin_unlock_irqrestore(&pfc->lock, flags);
|
||||
}
|
||||
|
||||
static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev,
|
||||
struct pinctrl_gpio_range *range,
|
||||
unsigned offset, bool input)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
int type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT;
|
||||
|
||||
return sh_pfc_reconfig_pin(pmx->pfc, offset, type);
|
||||
}
|
||||
|
||||
static struct pinmux_ops sh_pfc_pinmux_ops = {
|
||||
.get_functions_count = sh_pfc_get_functions_count,
|
||||
.get_function_name = sh_pfc_get_function_name,
|
||||
.get_function_groups = sh_pfc_get_function_groups,
|
||||
.enable = sh_pfc_noop_enable,
|
||||
.disable = sh_pfc_noop_disable,
|
||||
.gpio_request_enable = sh_pfc_gpio_request_enable,
|
||||
.gpio_disable_free = sh_pfc_gpio_disable_free,
|
||||
.gpio_set_direction = sh_pfc_gpio_set_direction,
|
||||
};
|
||||
|
||||
static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
|
||||
unsigned long *config)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
struct sh_pfc *pfc = pmx->pfc;
|
||||
|
||||
*config = pfc->gpios[pin].flags & PINMUX_FLAG_TYPE;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
|
||||
unsigned long config)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
|
||||
/* Validate the new type */
|
||||
if (config >= PINMUX_FLAG_TYPE)
|
||||
return -EINVAL;
|
||||
|
||||
return sh_pfc_reconfig_pin(pmx->pfc, pin, config);
|
||||
}
|
||||
|
||||
static void sh_pfc_pinconf_dbg_show(struct pinctrl_dev *pctldev,
|
||||
struct seq_file *s, unsigned pin)
|
||||
{
|
||||
const char *pinmux_type_str[] = {
|
||||
[PINMUX_TYPE_NONE] = "none",
|
||||
[PINMUX_TYPE_FUNCTION] = "function",
|
||||
[PINMUX_TYPE_GPIO] = "gpio",
|
||||
[PINMUX_TYPE_OUTPUT] = "output",
|
||||
[PINMUX_TYPE_INPUT] = "input",
|
||||
[PINMUX_TYPE_INPUT_PULLUP] = "input bias pull up",
|
||||
[PINMUX_TYPE_INPUT_PULLDOWN] = "input bias pull down",
|
||||
};
|
||||
unsigned long config;
|
||||
int rc;
|
||||
|
||||
rc = sh_pfc_pinconf_get(pctldev, pin, &config);
|
||||
if (unlikely(rc != 0))
|
||||
return;
|
||||
|
||||
seq_printf(s, " %s", pinmux_type_str[config]);
|
||||
}
|
||||
|
||||
static struct pinconf_ops sh_pfc_pinconf_ops = {
|
||||
.pin_config_get = sh_pfc_pinconf_get,
|
||||
.pin_config_set = sh_pfc_pinconf_set,
|
||||
.pin_config_dbg_show = sh_pfc_pinconf_dbg_show,
|
||||
};
|
||||
|
||||
static struct pinctrl_gpio_range sh_pfc_gpio_range = {
|
||||
.name = DRV_NAME,
|
||||
.id = 0,
|
||||
};
|
||||
|
||||
static struct pinctrl_desc sh_pfc_pinctrl_desc = {
|
||||
.name = DRV_NAME,
|
||||
.owner = THIS_MODULE,
|
||||
.pctlops = &sh_pfc_pinctrl_ops,
|
||||
.pmxops = &sh_pfc_pinmux_ops,
|
||||
.confops = &sh_pfc_pinconf_ops,
|
||||
};
|
||||
|
||||
static inline void sh_pfc_map_one_gpio(struct sh_pfc *pfc,
|
||||
struct sh_pfc_pinctrl *pmx,
|
||||
struct pinmux_gpio *gpio,
|
||||
unsigned offset)
|
||||
{
|
||||
struct pinmux_data_reg *dummy;
|
||||
unsigned long flags;
|
||||
int bit;
|
||||
|
||||
gpio->flags &= ~PINMUX_FLAG_TYPE;
|
||||
|
||||
if (sh_pfc_get_data_reg(pfc, offset, &dummy, &bit) == 0)
|
||||
gpio->flags |= PINMUX_TYPE_GPIO;
|
||||
else {
|
||||
gpio->flags |= PINMUX_TYPE_FUNCTION;
|
||||
|
||||
spin_lock_irqsave(&pmx->lock, flags);
|
||||
pmx->nr_functions++;
|
||||
spin_unlock_irqrestore(&pmx->lock, flags);
|
||||
}
|
||||
}
|
||||
|
||||
/* pinmux ranges -> pinctrl pin descs */
|
||||
static int sh_pfc_map_gpios(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
|
||||
{
|
||||
unsigned long flags;
|
||||
int i;
|
||||
|
||||
pmx->nr_pads = pfc->last_gpio - pfc->first_gpio + 1;
|
||||
|
||||
pmx->pads = kmalloc(sizeof(struct pinctrl_pin_desc) * pmx->nr_pads,
|
||||
GFP_KERNEL);
|
||||
if (unlikely(!pmx->pads)) {
|
||||
pmx->nr_pads = 0;
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&pfc->lock, flags);
|
||||
|
||||
/*
|
||||
* We don't necessarily have a 1:1 mapping between pin and linux
|
||||
* GPIO number, as the latter maps to the associated enum_id.
|
||||
* Care needs to be taken to translate back to pin space when
|
||||
* dealing with any pin configurations.
|
||||
*/
|
||||
for (i = 0; i < pmx->nr_pads; i++) {
|
||||
struct pinctrl_pin_desc *pin = pmx->pads + i;
|
||||
struct pinmux_gpio *gpio = pfc->gpios + i;
|
||||
|
||||
pin->number = pfc->first_gpio + i;
|
||||
pin->name = gpio->name;
|
||||
|
||||
/* XXX */
|
||||
if (unlikely(!gpio->enum_id))
|
||||
continue;
|
||||
|
||||
sh_pfc_map_one_gpio(pfc, pmx, gpio, i);
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&pfc->lock, flags);
|
||||
|
||||
sh_pfc_pinctrl_desc.pins = pmx->pads;
|
||||
sh_pfc_pinctrl_desc.npins = pmx->nr_pads;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sh_pfc_map_functions(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
|
||||
{
|
||||
unsigned long flags;
|
||||
int i, fn;
|
||||
|
||||
pmx->functions = kzalloc(pmx->nr_functions * sizeof(void *),
|
||||
GFP_KERNEL);
|
||||
if (unlikely(!pmx->functions))
|
||||
return -ENOMEM;
|
||||
|
||||
spin_lock_irqsave(&pmx->lock, flags);
|
||||
|
||||
for (i = fn = 0; i < pmx->nr_pads; i++) {
|
||||
struct pinmux_gpio *gpio = pfc->gpios + i;
|
||||
|
||||
if ((gpio->flags & PINMUX_FLAG_TYPE) == PINMUX_TYPE_FUNCTION)
|
||||
pmx->functions[fn++] = gpio;
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&pmx->lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sh_pfc_pinctrl_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct sh_pfc *pfc;
|
||||
int ret;
|
||||
|
||||
if (unlikely(!sh_pfc_pmx))
|
||||
return -ENODEV;
|
||||
|
||||
pfc = sh_pfc_pmx->pfc;
|
||||
|
||||
ret = sh_pfc_map_gpios(pfc, sh_pfc_pmx);
|
||||
if (unlikely(ret != 0))
|
||||
return ret;
|
||||
|
||||
ret = sh_pfc_map_functions(pfc, sh_pfc_pmx);
|
||||
if (unlikely(ret != 0))
|
||||
goto free_pads;
|
||||
|
||||
sh_pfc_pmx->pctl = pinctrl_register(&sh_pfc_pinctrl_desc, &pdev->dev,
|
||||
sh_pfc_pmx);
|
||||
if (IS_ERR(sh_pfc_pmx->pctl)) {
|
||||
ret = PTR_ERR(sh_pfc_pmx->pctl);
|
||||
goto free_functions;
|
||||
}
|
||||
|
||||
sh_pfc_gpio_range.npins = pfc->last_gpio - pfc->first_gpio + 1;
|
||||
sh_pfc_gpio_range.base = pfc->first_gpio;
|
||||
sh_pfc_gpio_range.pin_base = pfc->first_gpio;
|
||||
|
||||
pinctrl_add_gpio_range(sh_pfc_pmx->pctl, &sh_pfc_gpio_range);
|
||||
|
||||
platform_set_drvdata(pdev, sh_pfc_pmx);
|
||||
|
||||
return 0;
|
||||
|
||||
free_functions:
|
||||
kfree(sh_pfc_pmx->functions);
|
||||
free_pads:
|
||||
kfree(sh_pfc_pmx->pads);
|
||||
kfree(sh_pfc_pmx);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int sh_pfc_pinctrl_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = platform_get_drvdata(pdev);
|
||||
|
||||
pinctrl_unregister(pmx->pctl);
|
||||
|
||||
platform_set_drvdata(pdev, NULL);
|
||||
|
||||
kfree(sh_pfc_pmx->functions);
|
||||
kfree(sh_pfc_pmx->pads);
|
||||
kfree(sh_pfc_pmx);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver sh_pfc_pinctrl_driver = {
|
||||
.probe = sh_pfc_pinctrl_probe,
|
||||
.remove = sh_pfc_pinctrl_remove,
|
||||
.driver = {
|
||||
.name = DRV_NAME,
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device sh_pfc_pinctrl_device = {
|
||||
.name = DRV_NAME,
|
||||
.id = -1,
|
||||
};
|
||||
|
||||
static int sh_pfc_pinctrl_init(void)
|
||||
{
|
||||
int rc;
|
||||
|
||||
rc = platform_driver_register(&sh_pfc_pinctrl_driver);
|
||||
if (likely(!rc)) {
|
||||
rc = platform_device_register(&sh_pfc_pinctrl_device);
|
||||
if (unlikely(rc))
|
||||
platform_driver_unregister(&sh_pfc_pinctrl_driver);
|
||||
}
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
|
||||
{
|
||||
sh_pfc_pmx = kzalloc(sizeof(struct sh_pfc_pinctrl), GFP_KERNEL);
|
||||
if (unlikely(!sh_pfc_pmx))
|
||||
return -ENOMEM;
|
||||
|
||||
spin_lock_init(&sh_pfc_pmx->lock);
|
||||
|
||||
sh_pfc_pmx->pfc = pfc;
|
||||
|
||||
return sh_pfc_pinctrl_init();
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(sh_pfc_register_pinctrl);
|
||||
|
||||
static void __exit sh_pfc_pinctrl_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&sh_pfc_pinctrl_driver);
|
||||
}
|
||||
module_exit(sh_pfc_pinctrl_exit);
|
||||
Loading…
Add table
Add a link
Reference in a new issue