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iommu/amd: Use pci_prg_resp_pasid_required()
Commit e5567f5f67
("PCI/ATS: Add pci_prg_resp_pasid_required()
interface.") added a common interface to check the PASID bit in the PRI
capability. Use it in the AMD driver.
Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
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parent
15ade5d2e7
commit
83d18bdff1
1 changed files with 1 additions and 18 deletions
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@ -2122,23 +2122,6 @@ out_err:
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return ret;
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return ret;
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}
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}
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/* FIXME: Move this to PCI code */
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#define PCI_PRI_TLP_OFF (1 << 15)
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static bool pci_pri_tlp_required(struct pci_dev *pdev)
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{
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u16 status;
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int pos;
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pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
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if (!pos)
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return false;
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pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status);
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return (status & PCI_PRI_TLP_OFF) ? true : false;
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}
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/*
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/*
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* If a device is not yet associated with a domain, this function makes the
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* If a device is not yet associated with a domain, this function makes the
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* device visible in the domain
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* device visible in the domain
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@ -2167,7 +2150,7 @@ static int attach_device(struct device *dev,
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dev_data->ats.enabled = true;
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dev_data->ats.enabled = true;
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dev_data->ats.qdep = pci_ats_queue_depth(pdev);
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dev_data->ats.qdep = pci_ats_queue_depth(pdev);
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dev_data->pri_tlp = pci_pri_tlp_required(pdev);
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dev_data->pri_tlp = pci_prg_resp_pasid_required(pdev);
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}
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}
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} else if (amd_iommu_iotlb_sup &&
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} else if (amd_iommu_iotlb_sup &&
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pci_enable_ats(pdev, PAGE_SHIFT) == 0) {
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pci_enable_ats(pdev, PAGE_SHIFT) == 0) {
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