riscv: Add StarFive JH7100 support

This commit is contained in:
Tom 2021-01-08 02:59:40 +08:00 committed by Emil Renner Berthing
parent b1108f5977
commit 8778e98f2c

View file

@ -19,6 +19,18 @@ config SOC_SIFIVE
help
This enables support for SiFive SoC platform hardware.
config SOC_STARFIVE_VIC7100
bool "StarFive VIC7100 SoC"
select SOC_SIFIVE
select OF_RESERVED_MEM
select SIFIVE_L2
select SIFIVE_L2_FLUSH
select DW_AXI_DMAC_STARFIVE
select PINCTRL
select PINCTRL_STARFIVE
help
This enables support for StarFive VIC7100 SoC Platform Hardware.
config SOC_VIRT
bool "QEMU Virt Machine"
select CLINT_TIMER if RISCV_M_MODE