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sifive/sifive_l2_cache: Add sifive_l2_flush64_range function
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parent
e0eaabbcc5
commit
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3 changed files with 59 additions and 1 deletions
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@ -7,4 +7,19 @@ config SIFIVE_L2
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help
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Support for the L2 cache controller on SiFive platforms.
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config SIFIVE_L2_FLUSH
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bool "Support Level 2 Cache Controller Flush operation of SiFive Soc"
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if SIFIVE_L2_FLUSH
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config SIFIVE_L2_FLUSH_START
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hex "Level 2 Cache Flush operation start"
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default 0x80000000
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config SIFIVE_L2_FLUSH_SIZE
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hex "Level 2 Cache Flush operation size"
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default 0x800000000
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endif # SIFIVE_L2_FLUSH
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endif
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@ -29,13 +29,17 @@
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#define SIFIVE_L2_DATECCFAIL_HIGH 0x164
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#define SIFIVE_L2_DATECCFAIL_COUNT 0x168
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#define SIFIVE_L2_FLUSH64 0x200
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#define SIFIVE_L2_CONFIG 0x00
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#define SIFIVE_L2_WAYENABLE 0x08
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#define SIFIVE_L2_ECCINJECTERR 0x40
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#define SIFIVE_L2_MAX_ECCINTR 4
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static void __iomem *l2_base;
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#define SIFIVE_L2_FLUSH64_LINE_LEN 64
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static void __iomem *l2_base = NULL;
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static int g_irq[SIFIVE_L2_MAX_ECCINTR];
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static struct riscv_cacheinfo_ops l2_cache_ops;
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@ -116,6 +120,41 @@ int unregister_sifive_l2_error_notifier(struct notifier_block *nb)
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}
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EXPORT_SYMBOL_GPL(unregister_sifive_l2_error_notifier);
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#ifdef CONFIG_SIFIVE_L2_FLUSH
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void sifive_l2_flush64_range(unsigned long start, unsigned long len)
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{
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unsigned long line;
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if(!l2_base) {
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pr_warn("L2CACHE: base addr invalid, skipping flush\n");
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return;
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}
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/* TODO: if (len == 0), skipping flush or going on? */
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if(!len) {
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pr_debug("L2CACHE: flush64 range @ 0x%lx(len:0)\n", start);
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return;
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}
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/* make sure the address is in the range */
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if(start < CONFIG_SIFIVE_L2_FLUSH_START ||
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(start + len) > (CONFIG_SIFIVE_L2_FLUSH_START +
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CONFIG_SIFIVE_L2_FLUSH_SIZE)) {
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pr_warn("L2CACHE: flush64 out of range: %lx(%lx), skip flush\n",
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start, len);
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return;
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}
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mb(); /* sync */
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for (line = start; line < start + len;
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line += SIFIVE_L2_FLUSH64_LINE_LEN) {
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writeq(line, l2_base + SIFIVE_L2_FLUSH64);
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mb();
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}
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}
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EXPORT_SYMBOL_GPL(sifive_l2_flush64_range);
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#endif
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static int l2_largest_wayenabled(void)
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{
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return readl(l2_base + SIFIVE_L2_WAYENABLE) & 0xFF;
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@ -7,6 +7,10 @@
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#ifndef __SOC_SIFIVE_L2_CACHE_H
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#define __SOC_SIFIVE_L2_CACHE_H
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#ifdef CONFIG_SIFIVE_L2_FLUSH
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extern void sifive_l2_flush64_range(unsigned long start, unsigned long len);
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#endif
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extern int register_sifive_l2_error_notifier(struct notifier_block *nb);
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extern int unregister_sifive_l2_error_notifier(struct notifier_block *nb);
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