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drm/amd/display: update bw_calcs to take pipe sync into account (v3)

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Properly set all_displays_in_sync so that when the data is
propagated to powerplay, it's set properly and we can enable
mclk switching when all monitors are in sync.

v2: fix logic, clean up
v3: check for blending chains, simplify logic

Acked-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2019-08-23 11:32:37 -05:00
parent 55b852069d
commit 8b2608f1cf
1 changed files with 28 additions and 2 deletions
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30
drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c
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@ -25,6 +25,7 @@
#include <linux/slab.h>
#include "resource.h"
#include "dm_services.h"
#include "dce_calcs.h"
#include "dc.h"
@ -2977,6 +2978,32 @@ static void populate_initial_data(
data->number_of_displays = num_displays;
}
static bool all_displays_in_sync(const struct pipe_ctx pipe[],
int pipe_count)
{
const struct pipe_ctx *active_pipes[MAX_PIPES];
int i, num_active_pipes = 0;
for (i = 0; i < pipe_count; i++) {
if (!pipe[i].stream || pipe[i].top_pipe)
continue;
active_pipes[num_active_pipes++] = &pipe[i];
}
if (!num_active_pipes)
return false;
for (i = 1; i < num_active_pipes; ++i) {
if (!resource_are_streams_timing_synchronizable(
active_pipes[0]->stream, active_pipes[i]->stream)) {
return false;
}
}
return true;
}
/**
* Return:
* true - Display(s) configuration supported.
@ -2998,8 +3025,7 @@ bool bw_calcs(struct dc_context *ctx,
populate_initial_data(pipe, pipe_count, data);
/*TODO: this should be taken out calcs output and assigned during timing sync for pplib use*/
calcs_output->all_displays_in_sync = false;
calcs_output->all_displays_in_sync = all_displays_in_sync(pipe, pipe_count);
if (data->number_of_displays != 0) {
uint8_t yclk_lvl, sclk_lvl;