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drm/amd/display: update bw_calcs to take pipe sync into account (v3)
Properly set all_displays_in_sync so that when the data is propagated to powerplay, it's set properly and we can enable mclk switching when all monitors are in sync. v2: fix logic, clean up v3: check for blending chains, simplify logic Acked-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1 changed files with 28 additions and 2 deletions
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@ -25,6 +25,7 @@
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#include <linux/slab.h>
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#include <linux/slab.h>
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#include "resource.h"
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#include "dm_services.h"
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#include "dm_services.h"
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#include "dce_calcs.h"
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#include "dce_calcs.h"
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#include "dc.h"
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#include "dc.h"
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@ -2977,6 +2978,32 @@ static void populate_initial_data(
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data->number_of_displays = num_displays;
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data->number_of_displays = num_displays;
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}
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}
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static bool all_displays_in_sync(const struct pipe_ctx pipe[],
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int pipe_count)
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{
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const struct pipe_ctx *active_pipes[MAX_PIPES];
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int i, num_active_pipes = 0;
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for (i = 0; i < pipe_count; i++) {
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if (!pipe[i].stream || pipe[i].top_pipe)
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continue;
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active_pipes[num_active_pipes++] = &pipe[i];
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}
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if (!num_active_pipes)
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return false;
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for (i = 1; i < num_active_pipes; ++i) {
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if (!resource_are_streams_timing_synchronizable(
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active_pipes[0]->stream, active_pipes[i]->stream)) {
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return false;
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}
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}
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return true;
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}
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/**
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/**
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* Return:
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* Return:
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* true - Display(s) configuration supported.
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* true - Display(s) configuration supported.
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@ -2998,8 +3025,7 @@ bool bw_calcs(struct dc_context *ctx,
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populate_initial_data(pipe, pipe_count, data);
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populate_initial_data(pipe, pipe_count, data);
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/*TODO: this should be taken out calcs output and assigned during timing sync for pplib use*/
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calcs_output->all_displays_in_sync = all_displays_in_sync(pipe, pipe_count);
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calcs_output->all_displays_in_sync = false;
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if (data->number_of_displays != 0) {
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if (data->number_of_displays != 0) {
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uint8_t yclk_lvl, sclk_lvl;
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uint8_t yclk_lvl, sclk_lvl;
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