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ASoC: rt5682: Add DAI clock binding info for WCLK/BCLK CCF usage
This patch describes that rt5682 can expose WCLK and BCLK clocks and how to use. Signed-off-by: Derek Fang <derek.fang@realtek.com> Link: https://lore.kernel.org/r/1582033912-6841-2-git-send-email-derek.fang@realtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -32,6 +32,12 @@ Optional properties:
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The delay time is realtek,btndet-delay value multiple of 8.192 ms.
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The delay time is realtek,btndet-delay value multiple of 8.192 ms.
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If absent, the default is 16.
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If absent, the default is 16.
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- #clock-cells : Should be set to '<1>', wclk and bclk sources provided.
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- clock-output-names : Name given for DAI clocks output.
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- clocks : phandle and clock specifier for codec MCLK.
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- clock-names : Clock name string for 'clocks' attribute, should be "mclk".
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Pins on the device (for linking into audio routes) for RT5682:
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Pins on the device (for linking into audio routes) for RT5682:
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* DMIC L1
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* DMIC L1
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@ -53,4 +59,10 @@ rt5682 {
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realtek,dmic1-clk-pin = <1>;
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realtek,dmic1-clk-pin = <1>;
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realtek,jd-src = <1>;
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realtek,jd-src = <1>;
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realtek,btndet-delay = <16>;
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realtek,btndet-delay = <16>;
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#clock-cells = <1>;
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clock-output-names = "rt5682-dai-wclk", "rt5682-dai-bclk";
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clocks = <&osc>;
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clock-names = "mclk";
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};
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};
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