GitHub-Mirror/Star64_linux
2
0
Fork 0
mirror of https://github.com/Fishwaldo/Star64_linux.git synced 2025-03-15 11:44:11 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

uart: 8250: Add dw auto flow ctrl support

Browse source 
Add designeware 8250 auto flow ctrl support. Enable
it by add auto-flow-control in dts.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
This commit is contained in:
Minda Chen 2023-06-25 09:40:29 +08:00 • committed by Justin Hammond
parent 7e4a587863
commit 8bfeae9f8d
5 changed files with 21 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
drivers/tty/serial/8250/8250_core.c
View file

@ -1084,6 +1084,8 @@ int serial8250_register_8250_port(const struct uart_8250_port *up)
uart->dl_read = up->dl_read;
if (up->dl_write)
uart->dl_write = up->dl_write;
if (up->probe)
uart->probe = up->probe;
if (uart->port.type != PORT_8250_CIR) {
if (serial8250_isa_config != NULL)

3
drivers/tty/serial/8250/8250_dw.c
View file

@ -525,6 +525,9 @@ static int dw8250_probe(struct platform_device *pdev)
/* Always ask for fixed clock rate from a property. */
device_property_read_u32(dev, "clock-frequency", &p->uartclk);
if (device_property_read_bool(dev, "auto-flow-control"))
up->probe |= UART_PROBE_AFE;
/* If there is separate baudclk, get the rate from it. */
data->clk = devm_clk_get_optional(dev, "baudclk");
if (data->clk == NULL)

14
drivers/tty/serial/8250/8250_port.c
View file

@ -316,6 +316,14 @@ static const struct serial8250_config uart_config[] = {
.rxtrig_bytes = {1, 4, 8, 14},
.flags = UART_CAP_FIFO,
},
[PORT_16550A_AFE] = {
.name = "16550A_AFE",
.fifo_size = 16,
.tx_loadsz = 16,
.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.rxtrig_bytes = {1, 4, 8, 14},
.flags = UART_CAP_FIFO | UART_CAP_AFE,
},
};
/* Uart divisor latch read */
@ -1182,6 +1190,11 @@ static void autoconfig_16550a(struct uart_8250_port *up)
up->port.type = PORT_U6_16550A;
up->capabilities |= UART_CAP_AFE;
}
if ((up->port.type == PORT_16550A) && (up->probe & UART_PROBE_AFE)) {
up->port.type = PORT_16550A_AFE;
up->capabilities |= UART_CAP_AFE;
}
}
/*
@ -2800,7 +2813,6 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
if (termios->c_cflag & CRTSCTS)
up->mcr |= UART_MCR_AFE;
}
/*
* Update the per-port timeout.
*/

1
include/linux/serial_8250.h
View file

@ -114,6 +114,7 @@ struct uart_8250_port {
unsigned char probe;
struct mctrl_gpios *gpios;
#define UART_PROBE_RSA (1 << 0)
#define UART_PROBE_AFE (1 << 1)
/*
* Some bits in registers are cleared on a read, so they must

2
include/uapi/linux/serial_core.h
View file

@ -277,4 +277,6 @@
/* Freescale LINFlexD UART */
#define PORT_LINFLEXUART 122
#define PORT_16550A_AFE 124
#endif /* _UAPILINUX_SERIAL_CORE_H */