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drm/i915: Split I915_RESET_IN_PROGRESS into two flags
I915_RESET_IN_PROGRESS is being used for both signaling the requirement to i915_mutex_lock_interruptible() to avoid taking the struct_mutex and to instruct a waiter (already holding the struct_mutex) to perform the reset. To allow for a little more coordination, split these two meaning into a couple of distinct flags. I915_RESET_BACKOFF tells i915_mutex_lock_interruptible() not to acquire the mutex and I915_RESET_HANDOFF tells the waiter to call i915_reset(). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Michel Thierry <michel.thierry@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170316171305.12972-1-chris@chris-wilson.co.uk
This commit is contained in:
parent
3fc03069bc
commit
8c185ecaf4
8 changed files with 71 additions and 59 deletions
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@ -1305,16 +1305,18 @@ static int i915_hangcheck_info(struct seq_file *m, void *unused)
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enum intel_engine_id id;
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enum intel_engine_id id;
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if (test_bit(I915_WEDGED, &dev_priv->gpu_error.flags))
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if (test_bit(I915_WEDGED, &dev_priv->gpu_error.flags))
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seq_printf(m, "Wedged\n");
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seq_puts(m, "Wedged\n");
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if (test_bit(I915_RESET_IN_PROGRESS, &dev_priv->gpu_error.flags))
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if (test_bit(I915_RESET_BACKOFF, &dev_priv->gpu_error.flags))
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seq_printf(m, "Reset in progress\n");
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seq_puts(m, "Reset in progress: struct_mutex backoff\n");
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if (test_bit(I915_RESET_HANDOFF, &dev_priv->gpu_error.flags))
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seq_puts(m, "Reset in progress: reset handoff to waiter\n");
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if (waitqueue_active(&dev_priv->gpu_error.wait_queue))
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if (waitqueue_active(&dev_priv->gpu_error.wait_queue))
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seq_printf(m, "Waiter holding struct mutex\n");
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seq_puts(m, "Waiter holding struct mutex\n");
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if (waitqueue_active(&dev_priv->gpu_error.reset_queue))
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if (waitqueue_active(&dev_priv->gpu_error.reset_queue))
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seq_printf(m, "struct_mutex blocked for reset\n");
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seq_puts(m, "struct_mutex blocked for reset\n");
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if (!i915.enable_hangcheck) {
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if (!i915.enable_hangcheck) {
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seq_printf(m, "Hangcheck disabled\n");
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seq_puts(m, "Hangcheck disabled\n");
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return 0;
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return 0;
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}
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}
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@ -4127,7 +4129,7 @@ i915_wedged_set(void *data, u64 val)
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* while it is writing to 'i915_wedged'
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* while it is writing to 'i915_wedged'
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*/
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*/
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if (i915_reset_in_progress(&dev_priv->gpu_error))
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if (i915_reset_backoff(&dev_priv->gpu_error))
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return -EAGAIN;
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return -EAGAIN;
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i915_handle_error(dev_priv, val,
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i915_handle_error(dev_priv, val,
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@ -1815,8 +1815,9 @@ void i915_reset(struct drm_i915_private *dev_priv)
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int ret;
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int ret;
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lockdep_assert_held(&dev_priv->drm.struct_mutex);
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lockdep_assert_held(&dev_priv->drm.struct_mutex);
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GEM_BUG_ON(!test_bit(I915_RESET_BACKOFF, &error->flags));
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if (!test_and_clear_bit(I915_RESET_IN_PROGRESS, &error->flags))
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if (!test_bit(I915_RESET_HANDOFF, &error->flags))
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return;
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return;
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/* Clear any previous failed attempts at recovery. Time to try again. */
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/* Clear any previous failed attempts at recovery. Time to try again. */
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@ -1869,7 +1870,9 @@ void i915_reset(struct drm_i915_private *dev_priv)
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wakeup:
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wakeup:
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i915_gem_reset_finish(dev_priv);
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i915_gem_reset_finish(dev_priv);
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enable_irq(dev_priv->drm.irq);
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enable_irq(dev_priv->drm.irq);
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wake_up_bit(&error->flags, I915_RESET_IN_PROGRESS);
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clear_bit(I915_RESET_HANDOFF, &error->flags);
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wake_up_bit(&error->flags, I915_RESET_HANDOFF);
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return;
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return;
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error:
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error:
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@ -1595,8 +1595,33 @@ struct i915_gpu_error {
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*/
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*/
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unsigned long reset_count;
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unsigned long reset_count;
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/**
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* flags: Control various stages of the GPU reset
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*
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* #I915_RESET_BACKOFF - When we start a reset, we want to stop any
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* other users acquiring the struct_mutex. To do this we set the
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* #I915_RESET_BACKOFF bit in the error flags when we detect a reset
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* and then check for that bit before acquiring the struct_mutex (in
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* i915_mutex_lock_interruptible()?). I915_RESET_BACKOFF serves a
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* secondary role in preventing two concurrent global reset attempts.
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*
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* #I915_RESET_HANDOFF - To perform the actual GPU reset, we need the
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* struct_mutex. We try to acquire the struct_mutex in the reset worker,
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* but it may be held by some long running waiter (that we cannot
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* interrupt without causing trouble). Once we are ready to do the GPU
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* reset, we set the I915_RESET_HANDOFF bit and wakeup any waiters. If
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* they already hold the struct_mutex and want to participate they can
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* inspect the bit and do the reset directly, otherwise the worker
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* waits for the struct_mutex.
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*
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* #I915_WEDGED - If reset fails and we can no longer use the GPU,
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* we set the #I915_WEDGED bit. Prior to command submission, e.g.
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* i915_gem_request_alloc(), this bit is checked and the sequence
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* aborted (with -EIO reported to userspace) if set.
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*/
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unsigned long flags;
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unsigned long flags;
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#define I915_RESET_IN_PROGRESS 0
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#define I915_RESET_BACKOFF 0
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#define I915_RESET_HANDOFF 1
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#define I915_WEDGED (BITS_PER_LONG - 1)
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#define I915_WEDGED (BITS_PER_LONG - 1)
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/**
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/**
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@ -3387,9 +3412,14 @@ i915_gem_find_active_request(struct intel_engine_cs *engine);
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void i915_gem_retire_requests(struct drm_i915_private *dev_priv);
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void i915_gem_retire_requests(struct drm_i915_private *dev_priv);
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static inline bool i915_reset_in_progress(struct i915_gpu_error *error)
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static inline bool i915_reset_backoff(struct i915_gpu_error *error)
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{
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{
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return unlikely(test_bit(I915_RESET_IN_PROGRESS, &error->flags));
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return unlikely(test_bit(I915_RESET_BACKOFF, &error->flags));
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}
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static inline bool i915_reset_handoff(struct i915_gpu_error *error)
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{
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return unlikely(test_bit(I915_RESET_HANDOFF, &error->flags));
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}
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}
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static inline bool i915_terminally_wedged(struct i915_gpu_error *error)
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static inline bool i915_terminally_wedged(struct i915_gpu_error *error)
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@ -3397,9 +3427,9 @@ static inline bool i915_terminally_wedged(struct i915_gpu_error *error)
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return unlikely(test_bit(I915_WEDGED, &error->flags));
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return unlikely(test_bit(I915_WEDGED, &error->flags));
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}
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}
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static inline bool i915_reset_in_progress_or_wedged(struct i915_gpu_error *error)
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static inline bool i915_reset_backoff_or_wedged(struct i915_gpu_error *error)
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{
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{
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return i915_reset_in_progress(error) | i915_terminally_wedged(error);
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return i915_reset_backoff(error) | i915_terminally_wedged(error);
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}
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}
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static inline u32 i915_reset_count(struct i915_gpu_error *error)
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static inline u32 i915_reset_count(struct i915_gpu_error *error)
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@ -103,16 +103,13 @@ i915_gem_wait_for_error(struct i915_gpu_error *error)
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might_sleep();
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might_sleep();
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if (!i915_reset_in_progress(error))
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return 0;
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/*
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/*
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* Only wait 10 seconds for the gpu reset to complete to avoid hanging
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* Only wait 10 seconds for the gpu reset to complete to avoid hanging
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* userspace. If it takes that long something really bad is going on and
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* userspace. If it takes that long something really bad is going on and
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* we should simply try to bail out and fail as gracefully as possible.
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* we should simply try to bail out and fail as gracefully as possible.
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*/
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*/
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ret = wait_event_interruptible_timeout(error->reset_queue,
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ret = wait_event_interruptible_timeout(error->reset_queue,
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!i915_reset_in_progress(error),
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!i915_reset_backoff(error),
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I915_RESET_TIMEOUT);
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I915_RESET_TIMEOUT);
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if (ret == 0) {
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if (ret == 0) {
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DRM_ERROR("Timed out waiting for the gpu reset to complete\n");
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DRM_ERROR("Timed out waiting for the gpu reset to complete\n");
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@ -1012,7 +1012,7 @@ bool __i915_spin_request(const struct drm_i915_gem_request *req,
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static bool __i915_wait_request_check_and_reset(struct drm_i915_gem_request *request)
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static bool __i915_wait_request_check_and_reset(struct drm_i915_gem_request *request)
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{
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{
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if (likely(!i915_reset_in_progress(&request->i915->gpu_error)))
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if (likely(!i915_reset_handoff(&request->i915->gpu_error)))
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return false;
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return false;
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__set_current_state(TASK_RUNNING);
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__set_current_state(TASK_RUNNING);
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@ -2631,22 +2631,6 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
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return ret;
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return ret;
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}
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}
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static void i915_error_wake_up(struct drm_i915_private *dev_priv)
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{
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/*
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* Notify all waiters for GPU completion events that reset state has
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* been changed, and that they need to restart their wait after
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* checking for potential errors (and bail out to drop locks if there is
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* a gpu reset pending so that i915_error_work_func can acquire them).
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*/
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/* Wake up __wait_seqno, potentially holding dev->struct_mutex. */
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wake_up_all(&dev_priv->gpu_error.wait_queue);
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/* Wake up intel_crtc_wait_for_pending_flips, holding crtc->mutex. */
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wake_up_all(&dev_priv->pending_flip_queue);
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}
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/**
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/**
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* i915_reset_and_wakeup - do process context error handling work
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* i915_reset_and_wakeup - do process context error handling work
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* @dev_priv: i915 device private
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* @dev_priv: i915 device private
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@ -2668,6 +2652,9 @@ static void i915_reset_and_wakeup(struct drm_i915_private *dev_priv)
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intel_prepare_reset(dev_priv);
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intel_prepare_reset(dev_priv);
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set_bit(I915_RESET_HANDOFF, &dev_priv->gpu_error.flags);
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wake_up_all(&dev_priv->gpu_error.wait_queue);
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do {
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do {
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/*
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/*
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* All state reset _must_ be completed before we update the
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* All state reset _must_ be completed before we update the
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@ -2682,7 +2669,7 @@ static void i915_reset_and_wakeup(struct drm_i915_private *dev_priv)
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/* We need to wait for anyone holding the lock to wakeup */
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/* We need to wait for anyone holding the lock to wakeup */
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} while (wait_on_bit_timeout(&dev_priv->gpu_error.flags,
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} while (wait_on_bit_timeout(&dev_priv->gpu_error.flags,
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I915_RESET_IN_PROGRESS,
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I915_RESET_HANDOFF,
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TASK_UNINTERRUPTIBLE,
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TASK_UNINTERRUPTIBLE,
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HZ));
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HZ));
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@ -2696,6 +2683,7 @@ static void i915_reset_and_wakeup(struct drm_i915_private *dev_priv)
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* Note: The wake_up also serves as a memory barrier so that
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* Note: The wake_up also serves as a memory barrier so that
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* waiters see the updated value of the dev_priv->gpu_error.
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* waiters see the updated value of the dev_priv->gpu_error.
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*/
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*/
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clear_bit(I915_RESET_BACKOFF, &dev_priv->gpu_error.flags);
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wake_up_all(&dev_priv->gpu_error.reset_queue);
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wake_up_all(&dev_priv->gpu_error.reset_queue);
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}
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}
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@ -2788,24 +2776,10 @@ void i915_handle_error(struct drm_i915_private *dev_priv,
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if (!engine_mask)
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if (!engine_mask)
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goto out;
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goto out;
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if (test_and_set_bit(I915_RESET_IN_PROGRESS,
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if (test_and_set_bit(I915_RESET_BACKOFF,
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&dev_priv->gpu_error.flags))
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&dev_priv->gpu_error.flags))
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goto out;
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goto out;
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/*
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* Wakeup waiting processes so that the reset function
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* i915_reset_and_wakeup doesn't deadlock trying to grab
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* various locks. By bumping the reset counter first, the woken
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* processes will see a reset in progress and back off,
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* releasing their locks and then wait for the reset completion.
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* We must do this for _all_ gpu waiters that might hold locks
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* that the reset work needs to acquire.
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*
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* Note: The wake_up also provides a memory barrier to ensure that the
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* waiters see the updated value of the reset flags.
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*/
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i915_error_wake_up(dev_priv);
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i915_reset_and_wakeup(dev_priv);
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i915_reset_and_wakeup(dev_priv);
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out:
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out:
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@ -3639,7 +3639,7 @@ static bool abort_flip_on_reset(struct intel_crtc *crtc)
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{
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{
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struct i915_gpu_error *error = &to_i915(crtc->base.dev)->gpu_error;
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struct i915_gpu_error *error = &to_i915(crtc->base.dev)->gpu_error;
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if (i915_reset_in_progress(error))
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if (i915_reset_backoff(error))
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return true;
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return true;
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if (crtc->reset_count != i915_reset_count(error))
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if (crtc->reset_count != i915_reset_count(error))
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@ -10595,7 +10595,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
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goto cleanup;
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goto cleanup;
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intel_crtc->reset_count = i915_reset_count(&dev_priv->gpu_error);
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intel_crtc->reset_count = i915_reset_count(&dev_priv->gpu_error);
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if (i915_reset_in_progress_or_wedged(&dev_priv->gpu_error)) {
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if (i915_reset_backoff_or_wedged(&dev_priv->gpu_error)) {
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ret = -EIO;
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ret = -EIO;
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goto unlock;
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goto unlock;
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}
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}
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@ -301,7 +301,8 @@ static int igt_global_reset(void *arg)
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/* Check that we can issue a global GPU reset */
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/* Check that we can issue a global GPU reset */
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set_bit(I915_RESET_IN_PROGRESS, &i915->gpu_error.flags);
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set_bit(I915_RESET_BACKOFF, &i915->gpu_error.flags);
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set_bit(I915_RESET_HANDOFF, &i915->gpu_error.flags);
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mutex_lock(&i915->drm.struct_mutex);
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mutex_lock(&i915->drm.struct_mutex);
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reset_count = i915_reset_count(&i915->gpu_error);
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reset_count = i915_reset_count(&i915->gpu_error);
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@ -314,7 +315,8 @@ static int igt_global_reset(void *arg)
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}
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}
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mutex_unlock(&i915->drm.struct_mutex);
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mutex_unlock(&i915->drm.struct_mutex);
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GEM_BUG_ON(test_bit(I915_RESET_IN_PROGRESS, &i915->gpu_error.flags));
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GEM_BUG_ON(test_bit(I915_RESET_HANDOFF, &i915->gpu_error.flags));
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clear_bit(I915_RESET_BACKOFF, &i915->gpu_error.flags);
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if (i915_terminally_wedged(&i915->gpu_error))
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if (i915_terminally_wedged(&i915->gpu_error))
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err = -EIO;
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err = -EIO;
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@ -330,7 +332,7 @@ static u32 fake_hangcheck(struct drm_i915_gem_request *rq)
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reset_count = i915_reset_count(&rq->i915->gpu_error);
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reset_count = i915_reset_count(&rq->i915->gpu_error);
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set_bit(I915_RESET_IN_PROGRESS, &rq->i915->gpu_error.flags);
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set_bit(I915_RESET_HANDOFF, &rq->i915->gpu_error.flags);
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wake_up_all(&rq->i915->gpu_error.wait_queue);
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wake_up_all(&rq->i915->gpu_error.wait_queue);
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return reset_count;
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return reset_count;
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@ -357,7 +359,7 @@ static int igt_wait_reset(void *arg)
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/* Check that we detect a stuck waiter and issue a reset */
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/* Check that we detect a stuck waiter and issue a reset */
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set_bit(I915_RESET_IN_PROGRESS, &i915->gpu_error.flags);
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set_bit(I915_RESET_BACKOFF, &i915->gpu_error.flags);
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mutex_lock(&i915->drm.struct_mutex);
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mutex_lock(&i915->drm.struct_mutex);
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err = hang_init(&h, i915);
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err = hang_init(&h, i915);
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@ -388,8 +390,8 @@ static int igt_wait_reset(void *arg)
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err = timeout;
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err = timeout;
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goto out_rq;
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goto out_rq;
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}
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}
|
||||||
GEM_BUG_ON(test_bit(I915_RESET_IN_PROGRESS, &i915->gpu_error.flags));
|
|
||||||
|
|
||||||
|
GEM_BUG_ON(test_bit(I915_RESET_HANDOFF, &i915->gpu_error.flags));
|
||||||
if (i915_reset_count(&i915->gpu_error) == reset_count) {
|
if (i915_reset_count(&i915->gpu_error) == reset_count) {
|
||||||
pr_err("No GPU reset recorded!\n");
|
pr_err("No GPU reset recorded!\n");
|
||||||
err = -EINVAL;
|
err = -EINVAL;
|
||||||
|
@ -402,6 +404,7 @@ fini:
|
||||||
hang_fini(&h);
|
hang_fini(&h);
|
||||||
unlock:
|
unlock:
|
||||||
mutex_unlock(&i915->drm.struct_mutex);
|
mutex_unlock(&i915->drm.struct_mutex);
|
||||||
|
clear_bit(I915_RESET_BACKOFF, &i915->gpu_error.flags);
|
||||||
|
|
||||||
if (i915_terminally_wedged(&i915->gpu_error))
|
if (i915_terminally_wedged(&i915->gpu_error))
|
||||||
return -EIO;
|
return -EIO;
|
||||||
|
@ -422,6 +425,7 @@ static int igt_reset_queue(void *arg)
|
||||||
if (!igt_can_mi_store_dword_imm(i915))
|
if (!igt_can_mi_store_dword_imm(i915))
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
|
set_bit(I915_RESET_BACKOFF, &i915->gpu_error.flags);
|
||||||
mutex_lock(&i915->drm.struct_mutex);
|
mutex_lock(&i915->drm.struct_mutex);
|
||||||
err = hang_init(&h, i915);
|
err = hang_init(&h, i915);
|
||||||
if (err)
|
if (err)
|
||||||
|
@ -470,8 +474,9 @@ static int igt_reset_queue(void *arg)
|
||||||
|
|
||||||
i915_reset(i915);
|
i915_reset(i915);
|
||||||
|
|
||||||
GEM_BUG_ON(test_bit(I915_RESET_IN_PROGRESS,
|
GEM_BUG_ON(test_bit(I915_RESET_HANDOFF,
|
||||||
&i915->gpu_error.flags));
|
&i915->gpu_error.flags));
|
||||||
|
|
||||||
if (prev->fence.error != -EIO) {
|
if (prev->fence.error != -EIO) {
|
||||||
pr_err("GPU reset not recorded on hanging request [fence.error=%d]!\n",
|
pr_err("GPU reset not recorded on hanging request [fence.error=%d]!\n",
|
||||||
prev->fence.error);
|
prev->fence.error);
|
||||||
|
@ -514,6 +519,7 @@ fini:
|
||||||
hang_fini(&h);
|
hang_fini(&h);
|
||||||
unlock:
|
unlock:
|
||||||
mutex_unlock(&i915->drm.struct_mutex);
|
mutex_unlock(&i915->drm.struct_mutex);
|
||||||
|
clear_bit(I915_RESET_BACKOFF, &i915->gpu_error.flags);
|
||||||
|
|
||||||
if (i915_terminally_wedged(&i915->gpu_error))
|
if (i915_terminally_wedged(&i915->gpu_error))
|
||||||
return -EIO;
|
return -EIO;
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue