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Merge branch 'CR_943_Timer_warning_Xingyu.Wu' into 'jh7110_fpga_dev_5.15'
drivers:timer:Fix warning by checkpatch.pl See merge request sdk/sft-riscvpi-linux-5.10!59
This commit is contained in:
commit
8e3f5f1133
1 changed files with 25 additions and 16 deletions
41
drivers/clocksource/timer-starfive.c
Normal file → Executable file
41
drivers/clocksource/timer-starfive.c
Normal file → Executable file
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@ -1,14 +1,8 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2021 StarFive, Inc <samin.guo@starfivetech.com>
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* Starfive Timer driver
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*
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* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING
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* CUSTOMERS WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER
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* FOR THEM TO SAVE TIME. AS A RESULT, STARFIVE SHALL NOT BE HELD LIABLE
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* FOR ANY DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY
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* CLAIMS ARISING FROM THE CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE
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* BY CUSTOMERS OF THE CODING INFORMATION CONTAINED HEREIN IN CONNECTION
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* WITH THEIR PRODUCTS.
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* Copyright 2021 StarFive, Inc. All rights reserved.
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*/
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#include <linux/clk.h>
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@ -19,14 +13,21 @@
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <linux/iopoll.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_clk.h>
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#include <linux/of_irq.h>
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#include <linux/sched_clock.h>
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#include <linux/module.h>
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#include "timer-starfive.h"
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#define CLOCK_SOURCE_RATE 200
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#define VALID_BITS 32
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#define DELAY_US 0
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#define TIMEOUT_US 10000
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struct starfive_timer __initdata jh7100_starfive_timer = {
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.ctrl = STF_TIMER_CTL,
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.load = STF_TIMER_LOAD,
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@ -69,11 +70,14 @@ static inline void timer_int_disable(struct starfive_clkevt *clkevt)
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static inline void timer_int_clear(struct starfive_clkevt *clkevt)
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{
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/* waiting interrupt can be to clearing */
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do {
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u32 value;
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int ret = 0;
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} while (readl(clkevt->intclr) & INT_STATUS_CLR_AVA);
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writel(1, clkevt->intclr);
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value = readl(clkevt->intclr);
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ret = readl_poll_timeout_atomic(clkevt->intclr, value,
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!(value & INT_STATUS_CLR_AVA), DELAY_US, TIMEOUT_US);
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if (!ret)
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writel(1, clkevt->intclr);
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}
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/*
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@ -178,9 +182,8 @@ starfive_get_clock_rate(struct starfive_clkevt *clkevt, struct device_node *np)
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pr_debug("Timer: try get clock-frequency:%d MHz\n", rate);
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clkevt->rate = (u64)rate;
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return 0;
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} else {
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pr_err("Timer: get rate failed, need clock-frequency define in dts.\n");
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}
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pr_err("Timer: get rate failed, need clock-frequency define in dts.\n");
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return -ENOENT;
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}
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@ -195,8 +198,9 @@ static int starfive_clocksource_init(struct starfive_clkevt *clkevt,
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timer_int_enable(clkevt);
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timer_enable(clkevt);
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clocksource_mmio_init(clkevt->value, name,
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clkevt->rate, 200, 32, clocksource_mmio_readl_down);
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clocksource_mmio_init(clkevt->value, name, clkevt->rate,
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CLOCK_SOURCE_RATE, VALID_BITS,
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clocksource_mmio_readl_down);
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return 0;
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}
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@ -408,3 +412,8 @@ static int __init starfive_timer_of_init(struct device_node *np)
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return do_starfive_timer_of_init(np, &jh7100_starfive_timer);
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}
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TIMER_OF_DECLARE(starfive_timer, "starfive,si5-timers", starfive_timer_of_init);
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MODULE_AUTHOR("xingyu.wu <xingyu.wu@starfivetech.com>");
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MODULE_AUTHOR("samin.guo <samin.guo@starfivetech.com>");
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MODULE_DESCRIPTION("StarFive Timer Device Driver");
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MODULE_LICENSE("GPL v2");
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