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firewire: optimize config ROM creation
The config ROM image of the local node was created in CPU byte order, then a temporary big endian copy was created to compute the CRC, and finally the card driver created its own big endian copy. We now generate it in big endian byte order in the first place to avoid one byte order conversion and the temporary on-stack copy of the ROM image (1000 bytes stack usage in process context). Furthermore, two 1000 bytes memset()s are replaced by one 1000 bytes - ROM length sized memset. The trivial fw_memcpy_{from,to}_be32() helpers are now superfluous and removed. The newly added __compute_block_crc() function will be folded into fw_compute_block_crc() in a subsequent change. Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
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4 changed files with 60 additions and 53 deletions
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@ -20,20 +20,6 @@
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#define fw_notify(s, args...) printk(KERN_NOTICE KBUILD_MODNAME ": " s, ## args)
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#define fw_error(s, args...) printk(KERN_ERR KBUILD_MODNAME ": " s, ## args)
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static inline void fw_memcpy_from_be32(void *_dst, void *_src, size_t size)
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{
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u32 *dst = _dst;
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__be32 *src = _src;
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int i;
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for (i = 0; i < size / 4; i++)
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dst[i] = be32_to_cpu(src[i]);
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}
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static inline void fw_memcpy_to_be32(void *_dst, void *_src, size_t size)
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{
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fw_memcpy_from_be32(_dst, _src, size);
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}
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#define CSR_REGISTER_BASE 0xfffff0000000ULL
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/* register offsets are relative to CSR_REGISTER_BASE */
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