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arm64: smccc: replace custom COUNT_ARGS() & CONCATENATE() implementations
Replace custom implementation of the macros from args.h. Link: https://lkml.kernel.org/r/20230718211147.18647-4-andriy.shevchenko@linux.intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Borislav Petkov (AMD) <bp@alien8.de> Cc: Brendan Higgins <brendan.higgins@linux.dev> Cc: Daniel Latypov <dlatypov@google.com> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: David Gow <davidgow@google.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lorenzo Pieralisi <lpieralisi@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Masami Hiramatsu (Google) <mhiramat@kernel.org> Cc: Shuah Khan <skhan@linuxfoundation.org> Cc: Steven Rostedt (Google) <rostedt@goodmis.org> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
This commit is contained in:
Andy Shevchenko
Andrew Morton
parent
15beb1b746
commit
90e3e18548
1 changed files with 32 additions and 37 deletions
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@ -5,6 +5,7 @@
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#ifndef __LINUX_ARM_SMCCC_H
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#define __LINUX_ARM_SMCCC_H
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#include <linux/args.h>
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#include <linux/init.h>
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#include <uapi/linux/const.h>
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@ -413,31 +414,26 @@ asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
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#endif
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#define ___count_args(_0, _1, _2, _3, _4, _5, _6, _7, _8, x, ...) x
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#define __constraint_read_2 "r" (arg0)
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#define __constraint_read_3 __constraint_read_2, "r" (arg1)
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#define __constraint_read_4 __constraint_read_3, "r" (arg2)
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#define __constraint_read_5 __constraint_read_4, "r" (arg3)
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#define __constraint_read_6 __constraint_read_5, "r" (arg4)
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#define __constraint_read_7 __constraint_read_6, "r" (arg5)
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#define __constraint_read_8 __constraint_read_7, "r" (arg6)
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#define __constraint_read_9 __constraint_read_8, "r" (arg7)
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#define __count_args(...) \
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___count_args(__VA_ARGS__, 7, 6, 5, 4, 3, 2, 1, 0)
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#define __constraint_read_0 "r" (arg0)
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#define __constraint_read_1 __constraint_read_0, "r" (arg1)
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#define __constraint_read_2 __constraint_read_1, "r" (arg2)
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#define __constraint_read_3 __constraint_read_2, "r" (arg3)
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#define __constraint_read_4 __constraint_read_3, "r" (arg4)
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#define __constraint_read_5 __constraint_read_4, "r" (arg5)
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#define __constraint_read_6 __constraint_read_5, "r" (arg6)
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#define __constraint_read_7 __constraint_read_6, "r" (arg7)
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#define __declare_arg_0(a0, res) \
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#define __declare_arg_2(a0, res) \
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struct arm_smccc_res *___res = res; \
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register unsigned long arg0 asm("r0") = (u32)a0
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#define __declare_arg_1(a0, a1, res) \
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#define __declare_arg_3(a0, a1, res) \
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typeof(a1) __a1 = a1; \
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struct arm_smccc_res *___res = res; \
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register unsigned long arg0 asm("r0") = (u32)a0; \
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register typeof(a1) arg1 asm("r1") = __a1
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#define __declare_arg_2(a0, a1, a2, res) \
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#define __declare_arg_4(a0, a1, a2, res) \
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typeof(a1) __a1 = a1; \
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typeof(a2) __a2 = a2; \
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struct arm_smccc_res *___res = res; \
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@ -445,7 +441,7 @@ asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
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register typeof(a1) arg1 asm("r1") = __a1; \
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register typeof(a2) arg2 asm("r2") = __a2
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#define __declare_arg_3(a0, a1, a2, a3, res) \
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#define __declare_arg_5(a0, a1, a2, a3, res) \
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typeof(a1) __a1 = a1; \
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typeof(a2) __a2 = a2; \
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typeof(a3) __a3 = a3; \
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@ -455,34 +451,26 @@ asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
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register typeof(a2) arg2 asm("r2") = __a2; \
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register typeof(a3) arg3 asm("r3") = __a3
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#define __declare_arg_4(a0, a1, a2, a3, a4, res) \
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#define __declare_arg_6(a0, a1, a2, a3, a4, res) \
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typeof(a4) __a4 = a4; \
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__declare_arg_3(a0, a1, a2, a3, res); \
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__declare_arg_5(a0, a1, a2, a3, res); \
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register typeof(a4) arg4 asm("r4") = __a4
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#define __declare_arg_5(a0, a1, a2, a3, a4, a5, res) \
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#define __declare_arg_7(a0, a1, a2, a3, a4, a5, res) \
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typeof(a5) __a5 = a5; \
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__declare_arg_4(a0, a1, a2, a3, a4, res); \
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__declare_arg_6(a0, a1, a2, a3, a4, res); \
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register typeof(a5) arg5 asm("r5") = __a5
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#define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res) \
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#define __declare_arg_8(a0, a1, a2, a3, a4, a5, a6, res) \
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typeof(a6) __a6 = a6; \
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__declare_arg_5(a0, a1, a2, a3, a4, a5, res); \
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__declare_arg_7(a0, a1, a2, a3, a4, a5, res); \
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register typeof(a6) arg6 asm("r6") = __a6
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#define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res) \
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#define __declare_arg_9(a0, a1, a2, a3, a4, a5, a6, a7, res) \
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typeof(a7) __a7 = a7; \
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__declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res); \
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__declare_arg_8(a0, a1, a2, a3, a4, a5, a6, res); \
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register typeof(a7) arg7 asm("r7") = __a7
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#define ___declare_args(count, ...) __declare_arg_ ## count(__VA_ARGS__)
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#define __declare_args(count, ...) ___declare_args(count, __VA_ARGS__)
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#define ___constraints(count) \
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: __constraint_read_ ## count \
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: smccc_sve_clobbers "memory"
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#define __constraints(count) ___constraints(count)
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/*
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* We have an output list that is not necessarily used, and GCC feels
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* entitled to optimise the whole sequence away. "volatile" is what
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@ -494,11 +482,14 @@ asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
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register unsigned long r1 asm("r1"); \
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register unsigned long r2 asm("r2"); \
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register unsigned long r3 asm("r3"); \
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__declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \
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CONCATENATE(__declare_arg_, \
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COUNT_ARGS(__VA_ARGS__))(__VA_ARGS__); \
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asm volatile(SMCCC_SVE_CHECK \
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inst "\n" : \
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"=r" (r0), "=r" (r1), "=r" (r2), "=r" (r3) \
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__constraints(__count_args(__VA_ARGS__))); \
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: CONCATENATE(__constraint_read_, \
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COUNT_ARGS(__VA_ARGS__)) \
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: smccc_sve_clobbers "memory"); \
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if (___res) \
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*___res = (typeof(*___res)){r0, r1, r2, r3}; \
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} while (0)
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@ -542,8 +533,12 @@ asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1,
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*/
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#define __fail_smccc_1_1(...) \
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do { \
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__declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \
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asm ("" : __constraints(__count_args(__VA_ARGS__))); \
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CONCATENATE(__declare_arg_, \
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COUNT_ARGS(__VA_ARGS__))(__VA_ARGS__); \
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asm ("" : \
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: CONCATENATE(__constraint_read_, \
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COUNT_ARGS(__VA_ARGS__)) \
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: smccc_sve_clobbers "memory"); \
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if (___res) \
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___res->a0 = SMCCC_RET_NOT_SUPPORTED; \
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} while (0)
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