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Renesas RISC-V SoC updates for v6.2
- Add Kconfig option for Renesas RISC-V SoCs. -----BEGIN PGP SIGNATURE----- iHQEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCY3dg4wAKCRCKwlD9ZEnx cAzkAPjBbXga6sPDUe1RELWr641OLFhviL5PvgLVd///DnbOAP0R2X3TZSZmyl+I gyfyr7SSYMVeXDSLKy67n8j8C3ONDA== =Xlpn -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmN7YRYACgkQmmx57+YA GNm5mQ/+IC+pyVZw3HsEi1oKdmXnttYn86pKHRRjVCs/LNfxzZscQHL0ccz4clbc GzdQkbpI3hg6LOZMZbqI0Lrl11mm2kaAQLEfFrkljtTA3CEtE5RiBzhencbHKyfZ T+vNp0XoR+2+qgq9jZIqObqXfgwCe1HpW032b46FCB9KC13k98kidzZIffGK/klw FghUsipgxN2cXyrAf8vzrYv2UkLvWuvlwZ5rt342pxJlcC7cvABkCtsIKvITPwoM kO/ZObLgTiVwMz7AK09vfWbyEG717P3kR08YyEKH898ZUEwm3I32KWNezmxPfoLw El/jtJpJ3ZeWxgzXLPLuex1XSTD8Nff+kGzJzUBRxE+w7r5I23GRDwArGbm6+MKO 57kE7FRN845FpdHDKtxU2MblF+1YGwl7tGmAJbz+M0MCNWIaErlT1UXvj7tG8R0g 5pGGaGsVF1z0KkDDj5Gmj6voFhhFkHCU/Xu71Pv16NxIP6Fh1y3/obY6zlokDiLF kDjUK3ltYOh1ePLtJa46762PU3+iYJo6m4t17l/0i7SgH4TtP7D/ZklxbTEbOQCP TihFmU7RSt6MsFBRfXvh7VLNCbKMCUfr6GLi7U8xyFF/7YFI9POsnkghSzUT1Afy vn0bF19T1JADfY/CfaDufMyP5rc6QKptnHMIvW4HWYYQ7o/jAxY= =4RxG -----END PGP SIGNATURE----- Merge tag 'renesas-riscv-soc-for-v6.2-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/soc Renesas RISC-V SoC updates for v6.2 - Add Kconfig option for Renesas RISC-V SoCs. * tag 'renesas-riscv-soc-for-v6.2-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: riscv: Kconfig.socs: Add ARCH_RENESAS kconfig option Link: https://lore.kernel.org/r/cover.1668788933.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@ -7,6 +7,11 @@ config SOC_MICROCHIP_POLARFIRE
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help
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This enables support for Microchip PolarFire SoC platforms.
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config ARCH_RENESAS
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bool "Renesas RISC-V SoCs"
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help
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This enables support for the RISC-V based Renesas SoCs.
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config SOC_SIFIVE
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bool "SiFive SoCs"
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select SERIAL_SIFIVE if TTY
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