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https://github.com/Fishwaldo/Star64_linux.git
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MTD updates for 4.12-rc1:
NAND, from Boris:
"""
- some minor fixes/improvements on existing drivers (fsmc, gpio, ifc,
davinci, brcmnand, omap)
- a huge cleanup/rework of the denali driver accompanied with core
fixes/improvements to simplify the driver code
- a complete rewrite of the atmel driver to support new DT bindings
make future evolution easier
- the addition of per-vendor detection/initialization steps to avoid
extending the nand_ids table with more extended-id entries
"""
SPI NOR, from Cyrille:
"""
- fixes in the hisi SPI controller driver.
- fixes in the intel SPI controller driver.
- fixes in the Mediatek SPI controller driver.
- fixes to some SPI flash memories not supported the Chip Erase command.
- add support to some new memory parts (Winbond, Macronix, Micron, ESMT).
- add new driver for the STM32 QSPI controller.
"""
And a few fixes for Gemini and Versatile platforms on physmap-of
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Merge tag 'for-linus-20170510' of git://git.infradead.org/linux-mtd
Pull MTD updates from Brian Norris:
"NAND, from Boris:
- some minor fixes/improvements on existing drivers (fsmc, gpio, ifc,
davinci, brcmnand, omap)
- a huge cleanup/rework of the denali driver accompanied with core
fixes/improvements to simplify the driver code
- a complete rewrite of the atmel driver to support new DT bindings
make future evolution easier
- the addition of per-vendor detection/initialization steps to avoid
extending the nand_ids table with more extended-id entries
SPI NOR, from Cyrille:
- fixes in the hisi, intel and Mediatek SPI controller drivers
- fixes to some SPI flash memories not supporting the Chip Erase
command.
- add support to some new memory parts (Winbond, Macronix, Micron,
ESMT).
- add new driver for the STM32 QSPI controller
And a few fixes for Gemini and Versatile platforms on physmap-of"
* tag 'for-linus-20170510' of git://git.infradead.org/linux-mtd: (100 commits)
MAINTAINERS: Update NAND subsystem git repositories
mtd: nand: gpio: update binding
mtd: nand: add ooblayout for old hamming layout
mtd: oxnas_nand: Allocating more than necessary in probe()
dt-bindings: mtd: Document the STM32 QSPI bindings
mtd: mtk-nor: set controller's address width according to nor flash
mtd: spi-nor: add driver for STM32 quad spi flash controller
mtd: nand: brcmnand: Check flash #WP pin status before nand erase/program
mtd: nand: davinci: add comment on NAND subpage write status on keystone
mtd: nand: omap2: Fix partition creation via cmdline mtdparts
mtd: nand: NULL terminate a of_device_id table
mtd: nand: Fix a couple error codes
mtd: nand: allow drivers to request minimum alignment for passed buffer
mtd: nand: allocate aligned buffers if NAND_OWN_BUFFERS is unset
mtd: nand: denali: allow to override revision number
mtd: nand: denali_dt: use pdev instead of ofdev for platform_device
mtd: nand: denali_dt: remove dma-mask DT property
mtd: nand: denali: support 64bit capable DMA engine
mtd: nand: denali_dt: enable HW_ECC_FIXUP for Altera SOCFPGA variant
mtd: nand: denali: support HW_ECC_FIXUP capability
...
This commit is contained in:
Linus Torvalds
commit
9786e34e0a
53 changed files with 6170 additions and 3831 deletions
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@ -388,7 +388,7 @@ static inline void mtd_set_of_node(struct mtd_info *mtd,
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static inline struct device_node *mtd_get_of_node(struct mtd_info *mtd)
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{
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return mtd->dev.of_node;
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return dev_of_node(&mtd->dev);
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}
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static inline int mtd_oobavail(struct mtd_info *mtd, struct mtd_oob_ops *ops)
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@ -366,26 +366,6 @@ struct onfi_ext_param_page {
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*/
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} __packed;
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struct nand_onfi_vendor_micron {
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u8 two_plane_read;
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u8 read_cache;
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u8 read_unique_id;
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u8 dq_imped;
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u8 dq_imped_num_settings;
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u8 dq_imped_feat_addr;
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u8 rb_pulldown_strength;
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u8 rb_pulldown_strength_feat_addr;
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u8 rb_pulldown_strength_num_settings;
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u8 otp_mode;
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u8 otp_page_start;
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u8 otp_data_prot_addr;
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u8 otp_num_pages;
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u8 otp_feat_addr;
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u8 read_retry_options;
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u8 reserved[72];
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u8 param_revision;
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} __packed;
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struct jedec_ecc_info {
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u8 ecc_bits;
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u8 codeword_size;
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@ -464,6 +444,17 @@ struct nand_jedec_params {
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__le16 crc;
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} __packed;
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/**
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* struct nand_id - NAND id structure
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* @data: buffer containing the id bytes. Currently 8 bytes large, but can
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* be extended if required.
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* @len: ID length.
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*/
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struct nand_id {
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u8 data[8];
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int len;
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};
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/**
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* struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independent devices
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* @lock: protection lock
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@ -525,7 +516,7 @@ static inline void nand_hw_control_init(struct nand_hw_control *nfc)
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* out-of-band data).
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* @read_page: function to read a page according to the ECC generator
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* requirements; returns maximum number of bitflips corrected in
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* any single ECC step, 0 if bitflips uncorrectable, -EIO hw error
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* any single ECC step, -EIO hw error
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* @read_subpage: function to read parts of the page covered by ECC;
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* returns same as read_page()
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* @write_subpage: function to write parts of the page covered by ECC.
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@ -720,6 +711,20 @@ nand_get_sdr_timings(const struct nand_data_interface *conf)
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return &conf->timings.sdr;
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}
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/**
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* struct nand_manufacturer_ops - NAND Manufacturer operations
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* @detect: detect the NAND memory organization and capabilities
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* @init: initialize all vendor specific fields (like the ->read_retry()
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* implementation) if any.
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* @cleanup: the ->init() function may have allocated resources, ->cleanup()
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* is here to let vendor specific code release those resources.
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*/
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struct nand_manufacturer_ops {
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void (*detect)(struct nand_chip *chip);
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int (*init)(struct nand_chip *chip);
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void (*cleanup)(struct nand_chip *chip);
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};
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/**
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* struct nand_chip - NAND Private Flash Chip Data
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* @mtd: MTD device registered to the MTD framework
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@ -750,6 +755,7 @@ nand_get_sdr_timings(const struct nand_data_interface *conf)
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* setting the read-retry mode. Mostly needed for MLC NAND.
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* @ecc: [BOARDSPECIFIC] ECC control structure
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* @buffers: buffer structure for read/write
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* @buf_align: minimum buffer alignment required by a platform
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* @hwcontrol: platform-specific hardware control structure
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* @erase: [REPLACEABLE] erase function
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* @scan_bbt: [REPLACEABLE] function to scan bad block table
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@ -793,6 +799,7 @@ nand_get_sdr_timings(const struct nand_data_interface *conf)
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* @pagebuf_bitflips: [INTERN] holds the bitflip count for the page which is
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* currently in data_buf.
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* @subpagesize: [INTERN] holds the subpagesize
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* @id: [INTERN] holds NAND ID
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* @onfi_version: [INTERN] holds the chip ONFI version (BCD encoded),
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* non 0 if ONFI supported.
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* @jedec_version: [INTERN] holds the chip JEDEC version (BCD encoded),
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@ -822,7 +829,7 @@ nand_get_sdr_timings(const struct nand_data_interface *conf)
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* @errstat: [OPTIONAL] hardware specific function to perform
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* additional error status checks (determine if errors are
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* correctable).
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* @write_page: [REPLACEABLE] High-level page write function
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* @manufacturer: [INTERN] Contains manufacturer information
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*/
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struct nand_chip {
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@ -847,9 +854,6 @@ struct nand_chip {
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int (*scan_bbt)(struct mtd_info *mtd);
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int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state,
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int status, int page);
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int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
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uint32_t offset, int data_len, const uint8_t *buf,
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int oob_required, int page, int cached, int raw);
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int (*onfi_set_features)(struct mtd_info *mtd, struct nand_chip *chip,
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int feature_addr, uint8_t *subfeature_para);
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int (*onfi_get_features)(struct mtd_info *mtd, struct nand_chip *chip,
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@ -881,6 +885,7 @@ struct nand_chip {
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int badblockpos;
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int badblockbits;
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struct nand_id id;
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int onfi_version;
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int jedec_version;
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union {
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@ -901,6 +906,7 @@ struct nand_chip {
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struct nand_ecc_ctrl ecc;
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struct nand_buffers *buffers;
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unsigned long buf_align;
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struct nand_hw_control hwcontrol;
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uint8_t *bbt;
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@ -910,6 +916,11 @@ struct nand_chip {
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struct nand_bbt_descr *badblock_pattern;
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void *priv;
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struct {
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const struct nand_manufacturer *desc;
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void *priv;
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} manufacturer;
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};
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extern const struct mtd_ooblayout_ops nand_ooblayout_sp_ops;
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@ -946,6 +957,17 @@ static inline void nand_set_controller_data(struct nand_chip *chip, void *priv)
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chip->priv = priv;
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}
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static inline void nand_set_manufacturer_data(struct nand_chip *chip,
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void *priv)
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{
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chip->manufacturer.priv = priv;
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}
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static inline void *nand_get_manufacturer_data(struct nand_chip *chip)
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{
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return chip->manufacturer.priv;
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}
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/*
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* NAND Flash Manufacturer ID Codes
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*/
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@ -1049,17 +1071,33 @@ struct nand_flash_dev {
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};
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/**
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* struct nand_manufacturers - NAND Flash Manufacturer ID Structure
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* struct nand_manufacturer - NAND Flash Manufacturer structure
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* @name: Manufacturer name
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* @id: manufacturer ID code of device.
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* @ops: manufacturer operations
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*/
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struct nand_manufacturers {
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struct nand_manufacturer {
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int id;
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char *name;
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const struct nand_manufacturer_ops *ops;
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};
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const struct nand_manufacturer *nand_get_manufacturer(u8 id);
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static inline const char *
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nand_manufacturer_name(const struct nand_manufacturer *manufacturer)
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{
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return manufacturer ? manufacturer->name : "Unknown";
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}
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extern struct nand_flash_dev nand_flash_ids[];
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extern struct nand_manufacturers nand_manuf_ids[];
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extern const struct nand_manufacturer_ops toshiba_nand_manuf_ops;
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extern const struct nand_manufacturer_ops samsung_nand_manuf_ops;
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extern const struct nand_manufacturer_ops hynix_nand_manuf_ops;
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extern const struct nand_manufacturer_ops micron_nand_manuf_ops;
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extern const struct nand_manufacturer_ops amd_nand_manuf_ops;
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extern const struct nand_manufacturer_ops macronix_nand_manuf_ops;
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int nand_default_bbt(struct mtd_info *mtd);
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int nand_markbad_bbt(struct mtd_info *mtd, loff_t offs);
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@ -1226,4 +1264,6 @@ int nand_reset(struct nand_chip *chip, int chipnr);
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/* Free resources held by the NAND device */
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void nand_cleanup(struct nand_chip *chip);
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/* Default extended ID decoding function */
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void nand_decode_ext_id(struct nand_chip *chip);
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#endif /* __LINUX_MTD_NAND_H */
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