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dt-bindings: riscv: sifive-ccache: Support StarFive JH71x0 SoCs

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This cache controller is also used on the StarFive JH7100 and JH7110
SoCs.

Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
This commit is contained in:
Emil Renner Berthing 2022-04-06 01:04:45 +02:00 • committed by Emil Renner Berthing
parent d07cdb8756
commit 978c0ca11f
1 changed files with 4 additions and 0 deletions
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4
Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml
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@ -25,6 +25,8 @@ select:
- sifive,ccache0
- sifive,fu540-c000-ccache
- sifive,fu740-c000-ccache
- starfive,jh7100-ccache
- starfive,jh7110-ccache
required:
- compatible
@ -37,6 +39,8 @@ properties:
- sifive,ccache0
- sifive,fu540-c000-ccache
- sifive,fu740-c000-ccache
- starfive,jh7100-ccache
- starfive,jh7110-ccache
- const: cache
- items:
- const: microchip,mpfs-ccache